Abstract: A method for developing a test sequence and for testing manufactured digital circuits. Test vectors are developed based on a simulation-based, directed-search approach. Specifically, from a given test vector, a next test vector is developed by altering the given test vector and determining the utility of the altered trial vector in propagating circuit faults to the primary outputs, based on a simulation of the circuit and a preselected cost function. The vector set is created through an iterative process of altering an accepted test vestor to develop a next trial vector. The vector set is efficiently developed by employing one phase that treats the entire set of circuit faults as the target, followed by another phase that targets specific faults that have not been detected in the previous phase.