Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on a winding axis to define a core and an outer circumference. The first electrode includes a first active material portion coated with an active material layer and a first uncoated portion not coated with an active material layer along a winding direction. At least a part of the first uncoated portion is defined as an electrode tab by itself. The first uncoated portion includes a first portion adjacent to the core of the electrode assembly, a second portion adjacent to the outer circumference of the electrode assembly, and a third portion interposed between the first portion and the second portion. The first portion or the second portion has a smaller height than the third portion in the winding axis direction.

Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on an axis to define a core and an outer circumference. The first electrode includes an uncoated portion at a long side end thereof and exposed out of the separator along a winding axis direction of the electrode assembly. A part of the uncoated portion is bent in a radial direction of the electrode assembly to form a bending surface region that includes overlapping layers of the uncoated portion, and in a partial region of the bending surface region, the number of stacked layers of the uncoated portion is 10 or more in the winding axis direction of the electrode assembly.

Abstract: A surface plasmon resonance imaging apparatus is provided. The surface plasmon resonance imaging apparatus includes a light irradiation unit configured to irradiate polarized light onto a metal coating film provided on one surface of a prism, a light modulator configured to spatially pattern-encode light reflected by the metal coating film and the prism, a light detector configured to detect a pattern-encoded light signal, obtained through pattern-encoding by the light modulator, as a spectral signal, a signal processor configured to spatially decode the spectral signal and analyze a decoded spectral signal to generate characteristic data of a sample provided on the metal coating film, and an output unit configured to output the characteristic data of the sample as a two-dimensional (2D) image.

Abstract: The present invention provides a pharmaceutical composition for prevention or treatment of a stress disease and depression, the pharmaceutical composition be safely useable without toxicity and side effects by using an extract of leaves of Vaccinium bracteatum Thunb., which is natural resource of Korea, so that the reduction of manufacturing and production costs and the import substitution and export effects can be expected through the replacement of a raw material for preparation with a plant inhabiting in nature.

Abstract: The disclosure relates to a non-dispersive infrared (NDIR) gas sensor which detects the concentration of gas with a simple structure and method by manufacturing an optical waveguide with a gas-permeable polymer material instead of a conventional cavity or chamber type. An optical signal travels through the optical waveguide of gas-permeable polymer by total internal reflection, and the gas naturally penetrates the optical waveguide without the use of separate inlet and outlet openings, so that the optical signal and gas particles come into contact with each other within the optical waveguide. Since the optical signal detected by a photodetector at the other end of the optical waveguide after traveling while contacting the gas particles has properties changed according to the concentration of the gas which they have contacted in the optical waveguide, it is possible to measure the concentration of a specific gas from the detected optical signal.

Abstract: A semiconductor package includes a redistribution substrate having a first side and an opposite second side. A plurality of redistribution patterns are in the redistribution substrate, and a semiconductor chip is on the first side of the redistribution substrate. A plurality of metal pillars are positioned around and spaced apart from a periphery of the semiconductor chip and are connected to the redistribution patterns. A plurality of solder balls are on the second side of the redistribution substrate. Each of the metal pillars includes a third side facing the first side of the redistribution substrate, and an opposite fourth side. The fourth side has a square or octagonal shape in plan view.

Abstract: A method for operating a host device and a memory device, and a vehicle including the host device and the memory device are provided. The method for operating a host device includes detecting a need for an EOM (Eye Open Monitor) operation, transmitting a command for requesting the EOM operation to a memory device in response to the detection of the need to perform the EOM operation, and receiving a response signal including changed preset information from the memory device.

Abstract: Provided are an operating method of a host device, an operating method of a memory device, and a memory system. The operating method of a host device includes transmitting a request command for performing an eye-opening monitor (EOM) operation to a memory device, transmitting a parameter for performing the EOM operation to the memory device, transmitting pattern data for performing the EOM operation to the memory device, and receiving a first response signal including a result of the EOM operation performed based on the parameter and the pattern data from the memory device.

Abstract: A method of operating a host device includes transmitting a read command that requests information related to an eye open monitor (EOM) operation performed in a memory device to the memory device, and receiving a response signal including the information related to the EOM operation performed in the memory device from the memory device.

Abstract: A method for operating a host device and a memory device, and a vehicle including the host device and the memory device are provided. The method for operating a host device includes detecting a need for an EOM (Eye Open Monitor) operation, transmitting a command for requesting the EOM operation to a memory device in response to the detection of the need to perform the EOM operation, and receiving a response signal including changed preset information from the memory device.

Abstract: Provided are an operating method of a host device, an operating method of a memory device, and a memory system. The operating method of a host device includes transmitting a request command for performing an eye-opening monitor (EOM) operation to a memory device, transmitting a parameter for performing the EOM operation to the memory device, transmitting pattern data for performing the EOM operation to the memory device, and receiving a first response signal including a result of the EOM operation performed based on the parameter and the pattern data from the memory device.

Abstract: Provided is a compact digital attenuator. The compact digital attenuator includes a first attenuation cell to an nth attenuation cell, which include a plurality of attenuation cells connected to each other in parallel through a transmission line, wherein each of the plurality of attenuation cells may include a plurality of switch elements connected to each other in parallel, wherein the plurality of switch elements may be connected to the transmission line through one contact point.

Abstract: An electronic device includes a processor configured to control a system, a main memory including a first region configured to store normal data according to a normal operation and a second region configured to store monitoring data, a first cache configured to be activated in response to a monitoring enable signal of the processor and to access the second region, and a second cache configured to load the normal data according to the normal operation of the processor.

Abstract: A silicate phosphor composition is provided having a ?-phase of an orthorhombic crystal structure whose space group is Pbnm 62, and whose composition is represented by the following chemical formula: Ca2-x-y-zMxSiO4:yCe3+,zN(0?x<0.5,0<y?0.1,0?z<0.15) In the formula, M represents at least one member selected from the group consisting of Mg, Sr, Ba, Zn, Na, Al, Ga, Ge, P, As and Fe, and N represents at least one member selected from the group consisting of Eu2+, Mn2+, Tb3+, Yb2+ and Tm3+. The silicate phosphor has a maximum absorbance for a wavelength of about 450 nm to about 475 nm corresponding to a main part of a blue excitation light, and has a great stability at a high temperature. As such the silicate phosphor may be used in combination with a blue light source to produce a white light.

Abstract: Provided are a semiconductor package, a semiconductor memory module including the semiconductor package, and a system including the semiconductor memory module. The semiconductor package may include a plurality of main terminals arranged on a surface of the semiconductor package with constant intervals, and the plurality of main terminals may include terminals of a first set including a plurality of input/output terminals to which test signals may be input, and terminals of a second set including a plurality of input/output terminals to/from which signals other than the test signals may be input/output.

Abstract: A non-volatile memory device having a hidden cell located separate from data storage cells, and a method of effectively managing an erase count of the non-volatile memory device. The method includes preparing the non-volatile memory device that includes a hidden cell located separate from data storage cells and is not accessible to users of the data storage cells, and increasing an erase count stored in an erase count storing region of the hidden cell corresponding to at least one erased data storage cell when the at least one data storage cell is erased.

Abstract: A silicate phosphor composition is provided having a ?-phase of an orthorhombic crystal structure whose space group is Pbnm 62, and whose composition is represented by the following chemical formula: Ca2-x-y-zMxSiO4:yCe3+,zN(0?x<0.5,0<y?0.1,0?z<0.15) In the formula, M represents at least one member selected from the group consisting of Mg, Sr, Ba, Zn, Na, Al, Ga, Ge, P, As and Fe, and N represents at least one member selected from the group consisting of Eu2+, Mn2+, Tb3+, Yb2+ and Tm3+. The silicate phosphor has a maximum absorbance for a wavelength of about 450 nm to about 475 nm corresponding to a main part of a blue excitation light, and has a great stability at a high temperature. As such the silicate phosphor may be used in combination with a blue light source to produce a white light.

Abstract: Intermediate structures are provided that are formed during the manufacture of a memory device. These structures include first and second spaced apart gate patterns on a semiconductor substrate. A source/drain region is provided in the semiconductor substrate between the first and second gate patterns. An etch stop layer is provided on first and second sidewalls of the first gate pattern. The first and second sidewalls face each other to define a gap region between the etch stop layer on the first sidewall and the etch stop layer on the second sidewall. A dielectric layer is provided in the gap region. Finally, a preliminary contact hole is provided in the dielectric layer.

Abstract: Provided are a semiconductor package, a semiconductor memory module including the semiconductor package, and a system including the semiconductor memory module. The semiconductor package may include a plurality of main terminals arranged on a surface of the semiconductor package with constant intervals, and the plurality of main terminals may include terminals of a first set including a plurality of input/output terminals to which test signals may be input, and terminals of a second set including a plurality of input/output terminals to/from which signals other than the test signals may be input/output.

Abstract: A non-volatile memory device having a hidden cell located separate from data storage cells, and a method of effectively managing an erase count of the non-volatile memory device. The method includes preparing the non-volatile memory device that includes a hidden cell located separate from data storage cells and is not accessible to users of the data storage cells, and increasing an erase count stored in an erase count storing region of the hidden cell corresponding to at least one erased data storage cell when the at least one data storage cell is erased.