Abstract: A liquid-proof structure for wires includes a wire frame and a blocker. The wire frame has an accommodating space, at least one limiting slot and a second hole. The wire frame is disposed on the first hole and the wire frame provides a connection between an interior of the casing and outside through the second hole. The limiting slot is used for limiting a position of the wire. The blocker has at least one wire slot. The blocker is disposed in the accommodating space of the wire frame, and the wire slot is used for limiting a position of the wire. The wire is limited and fixed by the wire slot of the blocker. The wire is wrapped by the wire slot, so that liquid is prevented from going through the liquid-proof structure by an elasticity and a liquid-resistance of the blocker.

Abstract: A liquid-proof structure for wires includes a wire frame and a blocker. The wire frame has an accommodating space, at least one limiting slot and a second hole. The wire frame is disposed on the first hole and the wire frame provides a connection between an interior of the casing and outside through the second hole. The limiting slot is used for limiting a position of the wire. The blocker has at least one wire slot. The blocker is disposed in the accommodating space of the wire frame, and the wire slot is used for limiting a position of the wire. The wire is limited and fixed by the wire slot of the blocker. The wire is wrapped by the wire slot, so that liquid is prevented from going through the liquid-proof structure by an elasticity and a liquid-resistance of the blocker.

Abstract: A novel method and circuit are disclosed for providing an alternate function to a semiconductor device having a normal operating voltage range and an input pin for receiving an input signal of a voltage level within a normal signal voltage range, for selecting an alternate function, whose steps consist of determining, when a voltage is received at the input pin, whether the voltage is within a normal signal voltage range, enabling the performing of a primary function if the signal voltage is within a normal signal voltage range, and initiating an alternate function when the voltage is outside of the normal signal voltage range.

Abstract: A charge recycling integrated circuit and a method for integrated circuit charge recycling. In one aspect, a charge storage collector is interposed between a high voltage supply or a low voltage supply and a function block of the integrated circuit. The charge collector is operable to selectively store a charge dissipated in the function block when the logic circuitry of the function block switches between a high voltage value and a low voltage value. The dissipated charge resulting from the switching in the logic circuitry of the function block is selectively stored to the charge collector and the charge collector selectively returns the charge stored on the charge collector to the high voltage supply, the low voltage supply or to another node in the integrated circuit as appropriate.

Abstract: A memory system that provides statistical functions is provided. The memory system includes a dual-port memory array where one port is coupled to a statistics processor. The statistics processor can perform statistical analysis on data stored in the dual-port memory array in response to opcode commands received from an external processor.

Abstract: Capacitive coupling correction circuits are coupled between adjacent parallel dynamic (pre-charged) or static conductors. The capacitive coupling correction circuits effectively isolate a low voltage applied to a first conductor from a high pre-charged voltage stored on an adjacent second conductor (or vice versa). The adjacent parallel conductors can be bit lines of a memory cell. Each capacitive coupling correction circuit can include an inverter having an input terminal coupled to the first conductor, and an output terminal coupled to a first plate of a capacitor. A second plate of the capacitor is coupled to the second conductor. The capacitance of the capacitor is selected to be identical to a parasitic capacitance between the first and second conductors. As a result, there is a zero net voltage effect between the first and second conductors. The capacitive coupling correction circuits may be distributed along the length of the first and second conductors.

Abstract: A circuit for protecting the internal circuitry of a semiconductor chip from increased power supply voltages due to electrostatic discharge events is presented. The circuit comprises a trigger circuit including a resistor and diode array coupled between a power line and a ground line and a discharge circuit which, when turned on by an output signal of the trigger circuit, conducts the excess charge on the power line to ground.

Abstract: A modified printed wiring board for reducing the cracking of solder joints used to attach ceramic leadless chip carriers to the surface of the printed wiring board. A relatively thin expansion layer is provided on top of the conventional printed wiring board. This expansion layer is bonded to the printed wiring board except at locations underneath the footprint of the chip carrier and solder joints. This expansion layer reduces the stress on solder joints between the ceramic leadless chip carrier and the printed wiring board due to thermal expansion mismatch, to thereby reduce cracking of the solder joint. Prevention of bonding underneath the chip carrier footprint is provided by a thin layer of polytetrafluoroethylene (PTFE). Methods for applying ther PTFE layer are disclosed.