Patents by Inventor Kwang Yong Chung

Kwang Yong Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974433
    Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Heon Kang, Tae Hun Kim, Jae Ryong Sim, Kwang Young Jung, Gi Yong Chung, Jee Hoon Han, Doo Hee Hwang
  • Patent number: 7443018
    Abstract: An integrated circuit package system including a ribbon bond interconnect is provided, having a semiconductor device with at least one pad thereon. An external connection is provided. A heavy ribbon is provided and bonded to the external connection and to the pad on the semiconductor device.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: October 28, 2008
    Assignees: Stats Chippac Ltd., Orthodyne Electronics Corporation
    Inventors: You Yang Ong, Kwang Yong Chung, Mohd Helmy Bin Ahmad, Garrett L. Wong, Christoph B. Luechinger
  • Publication number: 20070108601
    Abstract: An integrated circuit package system including a ribbon bond interconnect is provided, having a semiconductor device with at least one pad thereon. An external connection is provided. A heavy ribbon is provided and bonded to the external connection and to the pad on the semiconductor device.
    Type: Application
    Filed: November 9, 2005
    Publication date: May 17, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: You Yang Ong, Kwang Yong Chung, Mohd Ahmad