Abstract: Provided herein are compositions and methods for increasing butyrate production in a subject. In particular, provided herein are compositions, probiotic compositions, and combinations thereof that promote butyrate production in a subject.

Abstract: Provided herein are compositions and methods for increasing butyrate production in a subject. In particular, provided herein are compositions, probiotic compositions, and combinations thereof that promote butyrate production in a subject.

Abstract: Provided is an LC resonance voltage-controlled oscillator (VCO) used for a multi-band multi-mode wireless transceiver. In order to generate a multi-band frequency, a capacitor bank and a switchable inductor are included in the LC resonance voltage-controlled oscillator. The LC resonance voltage-controlled oscillator employs an adjustable emitter-degeneration negative resistance cell in place of tail current sources in order to compensate for non-uniform oscillation amplitude caused by the capacitor bank and prevent the degradation of a phase noise due to the tail current sources.

Abstract: A wide-band multimode frequency synthesizer using a Phase Locked Loop (PLL) is provided. The multiband frequency synthesizer includes a multimode prescaler, a phase detector/a charge pump, a swallow type frequency divider, and a switching bank LC tuning voltage-controlled oscillator having wide-band and low phase noise characteristics. The multimode prescaler operates in five modes and divides a signal up to 12 GHz. The wide-band frequency synthesizer can be used in various fields such as WLAN/HYPERLAN/DSRC/UWB systems that operate in the frequency range from 2 GHz to 9 GHz.

Abstract: An ESD protection device with a silicon controlled rectifier (SCR) structure which is applied to a nano-device-based high-speed I/O interface circuit and semiconductor substrate operated by a low power voltage. The triple-well low-voltage-triggered ESD protection device includes: a deep n-type well formed on a p-type substrate; n- and p-type wells formed to be mutually connected in the deep n-type well; and a bias application region for applying a direct bias voltage to the p-type well.

Abstract: Disclosed is a fringe field switching mode transflective liquid crystal display capable of displaying high quality images. The transflective liquid crystal display includes a lower substrate having a counter electrode and a pixel electrode, an upper substrate aligned in opposition to the lower substrate by interposing a liquid crystal layer therebetween, an upper polarizing plate, a lower polarizing plate, a reflective plate provided at an inner portion of the lower substrate, a lower ?/2 plate, and an upper ?/2 plate. An inclination angle, a slit width and a slit interval of the pixel electrode of the reflective area are different from those of the pixel electrode of the transmissive area. The liquid crystal layer presents a phase delay of about 0 to ?/4 in the reflective area and presents a phase delay of about 0 to ?/2 in the transmissive area.

Abstract: A multi-cell gap fringe field switching mode LCD includes an upper substrate having an overcoat film and a lower substrate having a counter electrode and a pixel electrode successively formed thereon with a gate insulation film interposed between them. The overcoat film is patterned in such a manner that the cell gap at the center of the pixel electrode is different from that at the edge thereof and the overcoat film has a convex pattern formed on a part thereof corresponding to the center of the pixel electrode in a slanted profile and a concave pattern formed on a part thereof corresponding to the edge of the pixel electrode to optimize the driving voltage and phase delay value (?nd) in each position of the pixel electrode.

Abstract: Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC).

Abstract: Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs comprised of PNP and NPN bipolar transistors, with the result that the ESD protection circuit can have great discharge capacity.

Abstract: Disclosed are a multi-chip assembly and a method for driving the same. The multi-chip assembly includes a first chip designed with a first device driven by a first power source and a second chip designed with a second device driven by a second power source. A power applying section applies first power to the first device of the first chip and a power converting section converts the first power to second power upon receiving the first power from the power applying section and applies the second power to the second device of the second chip. It is possible to provide the multi-chip assembly in the form of a package fabricated by stacking chips designed with mutually different devices driven through a single power source.