Abstract: A location based Quality Assurance System and a method to collect data in work spaces in terms of locations, environment conditions, time, workers and behaviours, thru the wireless interactions (M2M) of located and installed sensors on sites and PPE with detachable or built-in sensors, which data wirelessly transmitted to remote servers for big data analysis in order to enhance effective communication and management of safety, work flow, work forces, worker attendance and project in work spaces.

Abstract: A location based Quality Assurance System and a method to collect data in work spaces in terms of locations, environment conditions, time, workers and behaviours, thru the wireless interactions (M2M) of located and installed sensors on sites and PPE with detachable or built-in sensors, which data wirelessly transmitted to remote servers for big data analysis in order to enhance effective communication and management of safety, work flow, work forces, worker attendance and project in work spaces.

Abstract: A method for designing integrated circuits includes receiving a floorplan design associated with an integrated circuit. A relative floorplanning constraint is extracted from the floorplan design. The floorplan of the integrated circuit is updated in response to the relative floorplanning constraint. Another method for designing integrated circuits includes receiving a floorplan design associated with an integrated circuit. A set of relative floorplanning constraint is received from the floorplan design. A relative floorplanning constraint is pushed down from the set of relative floorplanning constraints into a partition associated with the floorplan of the integrated circuit. The floorplan is updated in response to the set of relative floorplanning constraints.

Abstract: An integrated circuit and a method for using metal fill geometries to reduce the voltage drop in power meshes. Metal fill geometries are connected to the power mesh using vias or wires at multiple locations. Metal fill geometries are connected to other floating metal fill geometries using vias or wires at multiple locations. The circuit design introduces maximum redundancy between metal fill geometries and power mesh geometries, but partial redundancy between metal fill geometries and metal fill geometries. In particular, the redundancy in connectivity between metal fill geometries and metal fill geometries is kept minimal to reduce the number of geometries introduced. The high redundancy between metal fill geometries and power mesh geometries and the partial redundancy among metal fill geometries result in a smaller IR-drop by reducing the effective resistance on a power mesh.

Abstract: Optical means including an optical source, selection means and optical guiding means, the optical source includes means for producing a plurality of optical regions of different colours, the optical guiding means include a plurality of elongated optical guides for guiding light coupled to the upstream ends of the optical guides to their downstream ends, the selection means includes means for selectively aligning the upstream ends of the optical guides to one or a plurality of the optical regions.

Abstract: Optical means including an optical source, selection means and optical guiding means, the optical source includes means for producing a plurality of optical regions of different colours, the optical guiding means include a plurality of elongated optical guides for guiding light coupled to the upstream ends of the optical guides to their downstream ends, the selection means includes means for selectively aligning the upstream ends of the optical guides to one or a plurality of the optical regions.

Abstract: Disclosed is a subgrid detailed router that performs searches for wire locations at the grid level. Once a solution is found, the wire is placed in a based upon a finer subgrid. Specifically, the present invention includes subgrids that in a preferred embodiment have a resolution that is 16×greater than the resolution of the conventional grids. This increased resolution is useful for improving routing density with variable width and variable spacing designs. In operation, the subgrid detailed router of the present invention searches at the grid level for potential wire paths using a code associated with each grid. This code contains data corresponding to each of the subgrids, such that upon completion of a routing a net, information exists that allows for the placement of the net at locations corresponding to the subgrid that has finer resolution than the grid which was used to implement the routing search.

Abstract: Disclosed is a subgrid detailed router that performs searches for wire locations at the grid level. Once a solution is found, the wire is placed in a based upon a finer subgrid. Specifically, the present invention includes subgrids that in a preferred embodiment have a resolution that is 16X greater than the resolution of the conventional grids. This increased resolution is useful for improving routing density with variable width and variable spacing designs. In operation, the subgrid detailed router of the present invention searches at the grid level for potential wire paths using a code associated with each grid. This code contains data corresponding to each of the subgrids, such that upon completion of a routing a net, information exists that allows for the placement of the net at locations corresponding to the subgrid that has finer resolution than the grid which was used to implement the routing search.