Abstract: Integrated circuit chips include an internal circuit including interconnected semiconductor devices that are configured to provide integrated circuit functionality, and a Test Element Group (TEG) circuit that is configured to allow measuring of electrical characteristics of the semiconductor devices. By providing a TEG circuit in the same integrated circuit chip as the internal circuit, the TEG circuit may accurately represent the electrical characteristics of the interconnected semiconductor devices of the internal circuit of the associated integrated circuit chip. The integrated circuit chip may be coupled to a test apparatus. The test apparatus includes a test probe that is configured to simultaneously contact the internal circuit and the TEG circuit. The test apparatus also can simultaneously test the integrated circuit functionality of the internal circuit, and measure the electrical characteristics of the semiconductor devices via the TEG circuit.

Abstract: A semiconductor memory device generates a test clock signal (whose periods and cycle number are variable) having a shorter cycle than that of an external clock signal, and internally test data using the test clock signal. The semiconductor memory device may repeatedly perform read/write operations using the internally generated test clock signal during a half cycle of the external clock signal. By comparing output data in the read operation with known data, a test apparatus may determine whether memory cells of a memory device are normal. In a low-frequency test apparatus, it is possible to screen disadvantages that may occur when a high-speed memory device operates at a high frequency.

Abstract: Integrated circuit chips include an internal circuit including interconnected semiconductor devices that are configured to provide integrated circuit functionality, and a Test Element Group (TEG) circuit that is configured to allow measuring of electrical characteristics of the semiconductor devices. By providing a TEG circuit in the same integrated circuit chip as the internal circuit, the TEG circuit may accurately represent the electrical characteristics of the interconnected semiconductor devices of the internal circuit of the associated integrated circuit chip. The integrated circuit chip may be coupled to a test apparatus. The test apparatus includes a test probe that is configured to simultaneously contact the internal circuit and the TEG circuit. The test apparatus also can simultaneously test the integrated circuit functionality of the internal circuit, and measure the electrical characteristics of the semiconductor devices via the TEG circuit.

Abstract: A semiconductor memory device generates a test clock signal (whose periods and cycle number are variable) having a shorter cycle than that of an external clock signal, and internally test data using the test clock signal. The semiconductor memory device may repeatedly perform read/write operations using the internally generated test clock signal during a half cycle of the external clock signal. By comparing output data in the read operation with known data, a test apparatus may determine whether memory cells of a memory device are normal. In a low-frequency test apparatus, it is possible to screen disadvantages that may occur when a high-speed memory device operates at a high frequency.