Patents by Inventor Kwon-Sun Ryu

Kwon-Sun Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7098123
    Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: August 29, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Jun Heo, Sun-Pil Youn, Sung-Man Kim, Si-Young Choi, Gil-Heyun Choi, Ja-Hum Ku, Chang-Won Lee, Jong-Myeong Lee, Kwon-Sun Ryu
  • Publication number: 20060163677
    Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.
    Type: Application
    Filed: March 22, 2006
    Publication date: July 27, 2006
    Inventors: Seong-Jun Heo, Sun-Pil Youn, Sung-Man Kim, Si-Young Choi, Gil-Heyun Choi, Ja-Hum Ku, Chang-Won Lee, Jong-Myeong Lee, Kwon-Sun Ryu
  • Publication number: 20050020042
    Abstract: Methods of forming a semiconductor device having a metal gate electrode include sequentially forming a gate insulator, a gate polysilicon layer and a metal-gate layer on a semiconductor substrate. The metal-gate layer and the gate polysilicon layer are sequentially patterned to form a gate pattern comprising a stacked gate polysilicon pattern and a metal-gate pattern. An oxidation barrier layer is formed to cover at least a portion of a sidewall of the metal-gate pattern.
    Type: Application
    Filed: February 17, 2004
    Publication date: January 27, 2005
    Inventors: Seong-Jun Heo, Sun-Pil Youn, Sung-Man Kim, Si-Young Choi, Gil-Heyun Choi, Ja-Hum Ku, Chang-Won Lee, Jong-Myeong Lee, Kwon-Sun Ryu