Abstract: A semiconductor package on package includes a tower package, an upper package stacked over the lower package, a plug wire combined to any one of an upper portion of the tower package and a lower portion of the upper package, and a socket wire combined to any one of the upper portion of the lower package and the lower portion of the upper package. The plug wire is plugged into the socket wire to electrically connect the upper and lower packages.

Abstract: A semiconductor package on package includes a tower package, an upper package stacked over the lower package, a plug wire combined to any one of an upper portion of the tower package and a lower portion of the upper package, and a socket wire combined to any one of the upper portion of the lower package and the lower portion of the upper package. The plug wire is plugged into the socket wire to electrically connect the upper and lower packages.

Abstract: An ultrathin module is provided for special types of semiconductor devices such as image sensor devices and micro-electro-mechanical system (MEMS) devices. In the module, a chip cover is directly attached to a semiconductor chip so as to protect a light-sensing area or mechanical elements of the chip. The chip cover may also be used as a lens assembly and an infrared light filter. In a fabrication method, the chips are provided on a wafer, and the chip covers are attached to the chips, respectively, before the wafer is sliced to separate the chips from one another.

Abstract: An ultrathin module is provided for special types of semiconductor devices such as image sensor devices and micro-electro-mechanical system (MEMS) devices. In the module, a chip cover is directly attached to a semiconductor chip so as to protect a light-sensing area or mechanical elements of the chip. The chip cover may also be used as a lens assembly and an infrared light filter. In a fabrication method, the chips are provided on a wafer, and the chip covers are attached to the chips, respectively, before the wafer is sliced to separate the chips from one another.

Abstract: A semiconductor package comprises a semiconductor chip and a printed circuit board. The printed circuit board comprises a board body. An upper wiring layer is formed on the upper surface of the board body and includes a chip-mounting portion for mounting the semiconductor chip, board pads formed around the chip-mounting portion and electrically connected to said semiconductor chip, and an upper heat dissipation layer around said chip-mounting portion. Further, a lower wiring layer including a lower heat dissipation layer is formed on the lower surface of the board body. First heat-dissipating via holes are formed through the board body between the chip-mounting portion and the lower heat dissipation layer and are filled with a thermally conductive material for dissipating heat from the chip through the board body to the lower wiring layer.

Abstract: A semiconductor package comprises a semiconductor chip and a printed circuit board. The printed circuit board comprises a board body. An upper wiring layer is formed on the upper surface of the board body and includes a chip-mounting portion for mounting the semiconductor chip, board pads formed around the chip-mounting portion and electrically connected to said semiconductor chip, and an upper heat dissipation layer around said chip-mounting portion. Further, a lower wiring layer including a lower heat dissipation layer is formed on the lower surface of the board body. First heat-dissipating via holes are formed through the board body between the chip-mounting portion and the lower heat dissipation layer and are filled with a thermally conductive material for dissipating heat from the chip through the board body to the lower wiring layer.

Abstract: A lead frame and a semiconductor chip package including a side ring pad are disclosed. In the present invention, According to the present invention, a lead frame is provided with a die pad on which a semiconductor chip is mounted. A plurality of inner leads is electrically interconnected to corresponding electrode pads by a plurality of bonding wires. A side ring pad is disposed around the die pad and between the die pad and the inner leads. A tie bar connects the die pad and the side ring pad. The electrode pads include power electrode pads that are electrically interconnected to the side ring pad by power bonding wires. The bonding wires may include first link bonding wires connected between the electrode pads and the metal pads and second link boding wires connected between the metal pads and the inner leads.