Patents by Inventor Ky-Hien Do

Ky-Hien Do has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784382
    Abstract: A transmission-line network includes first, second, third, and fourth transmission lines. Signal conductors of the first and third transmission lines are connected in series and the signal conductors of the second and fourth transmission lines are connected in series. Signal-return conductors of the first and fourth transmission lines are connected in series. The signal-return conductors of the second and third transmission lines are connected in series. A first resistor may be connected between a junction between the signal conductors of the first and third transmission lines and a junction between the signal conductors of the second and fourth transmission lines. A second resistor may be connected between a junction between the signal-return conductors of the first and fourth transmission lines and a junction between the signal-return conductors of the second and third transmission lines.
    Type: Grant
    Filed: February 17, 2023
    Date of Patent: October 10, 2023
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Mariama Dadhi Barrie
  • Patent number: 11764454
    Abstract: A combiner/divider and method of designing a combiner/divider providing a single impedance transformation between a sum port and component ports with a determined insertion-loss variation over a determined operating bandwidth. Preferably the lowest number impedance-transformer sections are included that provide impedance transformation between the sum port and the component ports. A junction network preferably electrically connects a junction-network sum node to each of N junction-network component nodes. The junction-network sum node is connected to the sum port through at least a first impedance-transformer section of the ZT impedance-transformer sections. Each junction-network component node is connected to a respective one of the plurality of component ports through at least a respective second impedance-transformer section of the ZT impedance-transformer sections.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: September 19, 2023
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, William Deering
  • Patent number: 11757172
    Abstract: A transmission-line assembly provides a transition between more coupled and less coupled transmission lines. The more coupled transmission lines may be configured as a dual stripline, and the less coupled transmission lines may be configured as separate striplines or a dual stripline with reduced coupling. In an intermediate section, the transmission conductors transition between the more coupled and less coupled sections and at least one transmission conductor bends. A grounded shield conductor is coplanar with and edge-coupled to the one transmission conductor and extends along the bend in the one transmission conductor. The shield conductor is not connected to either of the transmission conductors, and overlaps the other transmission conductor when viewed normal to the planes of the transmission conductors, whereby the shield conductor is broadside coupled to the other transmission conductor.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: September 12, 2023
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Michael J. Surovich
  • Patent number: 11069950
    Abstract: In a four-port transmission-line network, a first transmission line is connected to a first port, second and third transmission lines are connected to a first component port, fourth and fifth transmission lines are connected to a second component port, and a sixth transmission line is connected to a fourth port. The transmission lines are connected as baluns to the ports with the unbalanced signal on the port side and the balanced signals interconnecting with others of the transmission lines. In another example, two or more baluns are connected serially. Each balun includes two transmission lines having signal-return conductors connected together at the ends. One end of a signal conductor on the first balun forms a sum port. One end of the signal-return conductors of the second balun forms a difference port, and a capacitor connects the other end of the signal-return conductors to circuit ground.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: July 20, 2021
    Assignee: Werlatone, Inc.
    Inventors: Ky-Hien Do, Allen F. Podell, Mariama Dadhi Barrie
  • Patent number: 11011818
    Abstract: First ends of a plurality of sub-networks of an exemplary transmission-line network are connected together electrically in series. First ends of a plurality of transmission lines of one subnetwork are connected together in parallel and second ends are connected together in series. The one sub-network has a first-end impedance value that is different than a second-end impedance value. The second-end impedance value of the one sub-network is different than a second-end impedance value of another sub-network. A respective transmission line connects each sub-network to a common circuit node and a respective resistor interconnects each adjacent pair of the second ends of the sub-networks.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: May 18, 2021
    Assignee: Werlatone, Inc.
    Inventors: Ky-Hien Do, Allen F. Podell, Mariama Dadhi Barrie
  • Patent number: 10978772
    Abstract: In a four-port transmission-line network, a first transmission line is connected to a first port, second and third transmission lines are connected to a first component port, fourth and fifth transmission lines are connected to a second component port, and a sixth transmission line is connected to a fourth port. The transmission lines are connected as baluns to the ports with the unbalanced signal on the port side and the balanced signals interconnecting with others of the transmission lines. In another example, two or more baluns are connected serially. Each balun includes two transmission lines having signal-return conductors connected together at the ends. One end of a signal conductor on the first balun forms a sum port. One end of the signal-return conductors of the second balun forms a difference port, and a capacitor connects the other end of the signal-return conductors to circuit ground.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: April 13, 2021
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Mariama Dadhi Barrie
  • Patent number: 10818996
    Abstract: A power sampler may include a sampling circuit interposed in one leg of a differential-signal circuit. An input balun may convert a single-ended signal from a signal source into a differential signal on first and second differential-signal input ports. An output balun may convert an output differential signal to a single-ended output signal to a signal load. The sampling circuit may include an inductance and a coupling circuit. The inductance may be an inductor and have an impedance higher than a source impedance. The coupling circuit, which may be a balun, is connected to the inductance and outputs a single-ended sample signal having a magnitude proportional to the inductance impedance at the design frequency. A second coupling-circuit output conducts an output differential signal and may be connected to the output balun.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: October 27, 2020
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Philip M. Robertson, Carl G. Schuster, Bernard J. Werlau, Ky-Hien Do
  • Patent number: 10680573
    Abstract: A transmission-line-based impedance transformer including first and second couplers, with each coupler including respective pairs of coupled signal conductors. The signal conductors are connected sequentially in series between an input port and an output port and may form a single spiral configuration. A signal conductor of one coupler may be connected in series between the two signal conductors of another coupler. The couplers have characteristic impedances between an input impedance and an output impedance. A signal conductor of a coupler may include first and second conductor portions disposed in respective spaced-apart parallel planes, with the other signal conductor of the coupler disposed physically directly between the conductor portions. A signal conductor in the spiral may be shielded from coupled signal conductors by ground conductors disposed in respective spaced-apart parallel planes on opposite sides of the shielded signal conductor.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: June 9, 2020
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Mariama Dadhi Barrie
  • Patent number: 10536128
    Abstract: A transmission-line-based impedance transformer including first and second couplers, with each coupler including respective pairs of coupled signal conductors. The signal conductors are connected sequentially in series between an input port and an output port and may form a single spiral configuration. A signal conductor of one coupler may be connected in series between the two signal conductors of another coupler. The couplers have characteristic impedances between an input impedance and an output impedance. A signal conductor of a coupler may include first and second conductor portions disposed in respective spaced-apart parallel planes, with the other signal conductor of the coupler disposed physically directly between the first and second conductor portions. A transmission-line signal conductor in the spiral may be shielded from coupled signal conductors by ground conductors disposed in respective spaced-apart parallel planes on opposite sides of the shielded signal conductor.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: January 14, 2020
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Mariama Dadhi Barrie
  • Patent number: 10418681
    Abstract: A multilayer coupler may include electromagnetically coupled planar first and second signal conductors that are separated by a gap, extend adjacent each other along a ground plane, and change orientation in a bend. A plate may be positioned along the bend between the ground plane and the signal conductors. The ground plane may have an opening extending along the bend and the plate. A multilayer coupler may include two coupled signal conductors formed in a loop having a four-wire section in which different sections of the two signal conductors overlap in a four-wire section. In a transition region in which the coupler transitions from the four-wire section to a two-wire section, an isolating ground plane may separate the two two-wire sections extending from the four-wire section. A bend in the transition region may include a plate between the two signal conductors and the ground plane.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: September 17, 2019
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Gregory J. Pflaum, Ky-Hien Do
  • Patent number: 10418680
    Abstract: A multilayer coupler may include electromagnetically coupled planar first and second signal conductors that are separated by a gap, extend adjacent each other along a ground plane, and change orientation in a bend. A plate may be positioned along the bend between the ground plane and the signal conductors. The ground plane may have an opening extending along the bend and the plate. A multilayer coupler may include two coupled signal conductors formed in a loop having a four-wire section in which different sections of the two signal conductors overlap in a four-wire section. In a transition region in which the coupler transitions from the four-wire section to a two-wire section, an isolating ground plane may separate the two two-wire sections extending from the four-wire section. A bend in the transition region may include a plate between the two signal conductors and the ground plane.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: September 17, 2019
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Gregory J. Pflaum, Ky-Hien Do
  • Patent number: 10217567
    Abstract: A multilayer capacitor may include a capacitor stack having pluralities of first and second plate electrodes connected to respective stack face terminals. Two face terminals on different stack sides are connected to the first plate electrodes. Two different face terminals also on different stack sides are connected to the second plate electrodes. Respective base conductors connect to the two sets of face terminals for connecting the capacitor to an external circuit. Three face terminals may be connected to the first or second plate electrodes. The base conductors may connect to the face terminals at the same relative position of the capacitor stack, at different relative positions of the capacitor stack. A capacitor stack may be positioned with a stack end facing a base substrate. Two multilayer capacitors may be mounted electrically in parallel with one or more lossy elements spanning a gap between the capacitors.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: February 26, 2019
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do
  • Patent number: 10193512
    Abstract: In some embodiments, a power divider/combiner assembly includes a divider network, a plurality of amplifiers, and a combiner network. The divider network divides a received divider-network input signal into N divider-network output signals. The divider network includes at least one divider and at least one divider phase-shift circuit. The plurality of amplifiers include N amplifiers for amplifying the divider-network signals. The combiner network is for combining the N amplified signals into a combiner-network output signal. The combiner network includes at least one combiner and at least one combiner phase-shift circuit. Each phase-shift circuit is configured to produce a respective non-zero phase shift between divider output signals or between combiner input signals.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: January 29, 2019
    Assignee: Werlatone, Inc.
    Inventors: Carl G. Schuster, Bernard J. Werlau, Peter A. Kuring, Ky-Hien Do
  • Publication number: 20180158615
    Abstract: A multilayer capacitor may include a capacitor stack having pluralities of first and second plate electrodes connected to respective stack face terminals. Two face terminals on different stack sides are connected to the first plate electrodes. Two different face terminals also on different stack sides are connected to the second plate electrodes. Respective base conductors connect to the two sets of face terminals for connecting the capacitor to an external circuit. Three face terminals may be connected to the first or second plate electrodes. The base conductors may connect to the face terminals at the same relative position of the capacitor stack, at different relative positions of the capacitor stack. A capacitor stack may be positioned with a stack end facing a base substrate. Two multilayer capacitors may be mounted electrically in parallel with one or more lossy elements spanning a gap between the capacitors.
    Type: Application
    Filed: December 6, 2017
    Publication date: June 7, 2018
    Applicant: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do
  • Patent number: 9325051
    Abstract: A transmission-line network may include a transmission-line sub-network. The sub-network may include at least first and second transmission lines having respective first ends connected electrically in series relative to a first circuit node and respective second ends connected electrically in parallel relative to a second circuit node. A third transmission line may have a first end directly connected to the second circuit node and a second end electrically connected to the second end of the first transmission line. A fourth transmission line may have a first end directly connected to the second circuit node and a second end electrically connected to the second end of the second transmission line. The transmission-line network may further include an impedance assembly disposed relative to the third and fourth transmission lines configured to produce resistance between the second end of the third transmission line and the second end of the fourth transmission line.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: April 26, 2016
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Philip M. Robertson, III
  • Patent number: 9077284
    Abstract: A radio frequency rectifier circuit may include a resistive termination to circuit ground, a plurality of inductors, and at least a first pair of rectifier components. The plurality of inductors may be connected electrically in series between an input node for receiving an input RF signal and the resistive termination. Each pair of electrically adjacent inductors of the plurality of inductors may be connected together at a respective in-line node. The first pair of rectifier components may electrically couple a first one of the in-line nodes to a respective direct current output node. Each rectifier component may have a cathode and an anode. A first rectifier component of the first pair of rectifier components may have the cathode electrically connected to the first in-line node and a second rectifier component of the first pair of rectifier components may have the anode electrically connected to the first in-line node.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: July 7, 2015
    Assignee: Werlatone, Inc.
    Inventors: Ky-Hien Do, Peter Kuring
  • Publication number: 20150003131
    Abstract: A radio frequency rectifier circuit may include a resistive termination to circuit ground, a plurality of inductors, and at least a first pair of rectifier components. The plurality of inductors may be connected electrically in series between an input node for receiving an input RF signal and the resistive termination. Each pair of electrically adjacent inductors of the plurality of inductors may be connected together at a respective in-line node. The first pair of rectifier components may electrically couple a first one of the in-line nodes to a respective direct current output node. Each rectifier component may have a cathode and an anode. A first rectifier component of the first pair of rectifier components may have the cathode electrically connected to the first in-line node and a second rectifier component of the first pair of rectifier components may have the anode electrically connected to the first in-line node.
    Type: Application
    Filed: June 26, 2013
    Publication date: January 1, 2015
    Inventors: Ky-Hien DO, Peter KURING
  • Patent number: 8704611
    Abstract: A hybrid filter may include sum, low-pass, high-pass, and intermediate nodes. A terminating impedance may couple the intermediate node to a circuit ground. A first low-pass network may couple the sum node to the low-pass node, and a first high-pass network may couple the sum node to the high-pass node. A second low-pass network may couple the high-pass node to the intermediate node. A second high-pass network may couple the low-pass node to the intermediate node. The second high-pass network may include the series connection of a first capacitor, a coupling network, and a second capacitor. The coupling network may include two coupling sections each with planar broadside-coupled first, second, and third conductor elements separated by dielectric layers. The first and third conductor elements in each section may be connected electrically in parallel.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: April 22, 2014
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Andrew Kearns, Ky-Hien Do
  • Publication number: 20140002210
    Abstract: A hybrid filter may include sum, low-pass, high-pass, and intermediate nodes. A terminating impedance may couple the intermediate node to a circuit ground. A first low-pass network may couple the sum node to the low-pass node, and a first high-pass network may couple the sum node to the high-pass node. A second low-pass network may couple the high-pass node to the intermediate node. A second high-pass network may couple the low-pass node to the intermediate node. The second high-pass network may include the series connection of a first capacitor, a coupling network, and a second capacitor. The coupling network may include two coupling sections each with planar broadside-coupled first, second, and third conductor elements separated by dielectric layers. The first and third conductor elements in each section may be connected electrically in parallel.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Applicant: WERLATONE, INC.
    Inventors: Allen F. Podell, Andrew Kearns, Ky-Hien Do
  • Patent number: 8570119
    Abstract: An ultra wide band-pass, absorptive band-reject filter has a pair of quadrature hybrid couplers cascaded and coupled by a phase shifting element and a matched pair of band-reject filters in two parallel paths. The matched pair of band-reject filters each rejects signals in a desired reject frequency band. The quadrature hybrid couplers each have an insertion loss amplitude crossover for signals propagated to terminals across the coupler that coincides with the reject frequency band. The phase shifting element is configured to have a phase shift of 180 degrees at frequencies in the reject frequency band. In a preferred embodiment, the pair of quadrature hybrid couplers are identical in performance and the band-reject filters are identical in performance with respect to a center frequency fn of the reject frequency band. The absorptive band-reject filter thereby provides an absorptive rejection response in the reject frequency band while a very wide pass-band frequency range is maintained.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: October 29, 2013
    Assignee: Terasys Technologies LLC
    Inventors: Ky-Hien Do, Kevin Miyashiro, Neil Kamikawa