Patents by Inventor Kyaw Oo Aung

Kyaw Oo Aung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230286233
    Abstract: A method of producing optical modules comprising transferring liquid polymer to a lens mold array by dipping an array of fingers of a transfer device into a liquid polymer, bringing the array of fingers into proximity with recesses of the lens mold array so that the liquid polymer is received in the recesses, then separating the array of fingers and the lens mold array so that liquid polymer is retained in the recesses, and forming lenses on optical devices by bringing the lens mold array into proximity with the array of optical devices so that the liquid polymer contacts a surface of the optical devices, and curing the liquid polymer to form the lenses on the optical devices.
    Type: Application
    Filed: September 23, 2021
    Publication date: September 14, 2023
    Inventors: QiChuan Yu, Kam Wah Leong, Kyaw Oo Aung, Yoong Kheng Teoh, Sung Hoe Hng
  • Publication number: 20230005896
    Abstract: A method of fabricating one or more optoelectronic devices each comprising at least one passive optical component. The method comprises providing a first carrier, depositing a soluble adhesive onto a surface of the first carrier, and placing a plurality of integrated circuit devices onto said surface and curing the soluble adhesive to fix the integrated circuit devices to the carrier.
    Type: Application
    Filed: April 29, 2021
    Publication date: January 5, 2023
    Inventors: Kam Wah Leong, QiChuan Yu, Yoong Kheng Teoh, Sung Hoe Hng, Kyaw Oo Aung
  • Patent number: 9281274
    Abstract: An integrated circuit substrate via system, and method of manufacture therefor, includes: a substrate having a substrate via in the substrate; a buffer layer patterned over the substrate via, the buffer layer having a planar surface; and a substrate via cap patterned over the buffer layer, the substrate via cap having a planar surface based on the planar surface of the buffer layer.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: March 8, 2016
    Assignee: STATS ChipPAC Ltd.
    Inventors: Xing Zhao, Chang Bum Yong, Duk Ju Na, Kyaw Oo Aung, Ling Ji
  • Patent number: 7443039
    Abstract: An integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is over the substrate. A second metallurgy layer is over the first metallurgy layer. A protective layer is over the first contact pad.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: October 28, 2008
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Lun Zhao, Wan Lay Looi, Kyaw Oo Aung, Yonggang Jin, Jae-Yong Song, Won Sun Shin
  • Publication number: 20060197223
    Abstract: An integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is over the substrate. A second metallurgy layer is over the first metallurgy layer. A protective layer is over the first contact pad.
    Type: Application
    Filed: December 23, 2005
    Publication date: September 7, 2006
    Applicant: ST ASSEMBLY TEST SERVICES LTD.
    Inventors: Lun Zhao, Wan Lay Looi, Kyaw Oo Aung, Yonggang Jin, Jae-Yong Song, Won Sun Shin
  • Patent number: 7005370
    Abstract: A method for manufacturing an integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is formed over the substrate. A second metallurgy layer is formed over the first metallurgy layer. The first metallurgy layer is removed while leaving a portion thereof over the second contact pad. The second metallurgy layer is removed while leaving a portion thereof over the second contact pad. A protective layer is formed over the first contact pad while removing the first metallurgy layer.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: February 28, 2006
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Lun Zhao, Wan Lay Looi, Kyaw Oo Aung, Yonggang Jin, Jae-Yong Song, Won Sun Shin