Patents by Inventor Kye-Jin Lee

Kye-Jin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12317532
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. An oscillation rate in the concentration of the first element per unit thickness of the buffer layer varies with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: May 27, 2025
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 12289901
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. A first oscillation rate between a first reference point and a second reference point within the buffer layer is less than a second oscillation rate between the second reference point and a third reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: April 29, 2025
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 12279444
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. A first oscillation rate between a first reference point and a second reference point within the buffer layer is greater than a second oscillation rate between the second reference point and a third reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: April 15, 2025
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 12274082
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from narrow to wide with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: April 8, 2025
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 12148713
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from wide to narrow with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: November 19, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 12125801
    Abstract: A semiconductor device includes a nucleation layer, a first buffer layer, a first nitride-based semiconductor layer, and a second buffer layer. The nucleation layer includes a compound which includes a first element. The first buffer layer includes a III-V compound which includes the first element. A concentration of the first element varies with respect to a first reference point within the first buffer layer. The first nitride-based semiconductor layer is disposed on the first buffer layer. The second buffer layer includes a III-V compound which includes a second element different than the first element. The second buffer layer is disposed on and forms an interface with the first nitride-based semiconductor layer. A concentration of the second element varies to cyclically oscillate as a function of a distance within a thickness of the second buffer layer, which occurs with respect to a second reference point within the second buffer layer.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 22, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 12125902
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first group III element and is devoid of a second group III element. The buffer layer includes a III-V compound which includes the first and second group III elements. The buffer layer has an element ratio of the first group III element to the second group III element that decrementally decreases and then incrementally increases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 22, 2024
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Yi-Lun Chou, Kye Jin Lee, Han-Chin Chiu, Xiuhua Pan
  • Patent number: 11827977
    Abstract: A CVD apparatus for manufacturing a III-nitride-based layer having a rotating wafer carrier positioned inside a reaction chamber that receives a mixture of a nitrogen gas source and a group III element gas source. Recesses are formed within the wafer carrier, each including a satellite disc of thickness x for accepting a wafer of thickness t. The satellite disc includes a peripheral notch of height a, and a notch thickness of x?a=b. A peripheral retaining ring includes a vertical rise portion extending a distance of e+f and a laterally-extending portion, the laterally-extending portion engaging the satellite disc notch. A gap c is formed between the substrate and a surface of the satellite disc. The relationship of a+b+c+t=b+e+f is satisfied such that laminar flow occurs in the region of the retaining ring.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: November 28, 2023
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventor: Kye Jin Lee
  • Publication number: 20230070825
    Abstract: A CVD apparatus for manufacturing a III-nitride-based layer having a rotating wafer carrier positioned inside a reaction chamber that receives a mixture of a nitrogen gas source and a group III element gas source. Recesses are formed within the wafer carrier, each including a satellite disc of thickness x for accepting a wafer of thickness t. The satellite disc includes a peripheral notch of height a, and a notch thickness of x?a=b. A peripheral retaining ring includes a vertical rise portion extending a distance of e+f and a laterally-extending portion, the laterally-extending portion engaging the satellite disc notch. A gap c is formed between the substrate and a surface of the satellite disc. The relationship of a+b+c+t=b+e+f is satisfied such that laminar flow occurs in the region of the retaining ring.
    Type: Application
    Filed: April 19, 2021
    Publication date: March 9, 2023
    Inventor: Kye Jin LEE
  • Publication number: 20230072850
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer is disposed on the substrate. The buffer layer includes a III-V compound which includes a first element. The buffer layer is disposed on the nucleation layer. The buffer layer has a variable concentration of the first element that incrementally increases and then decrementally decreases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: April 12, 2021
    Publication date: March 9, 2023
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20230031662
    Abstract: A III-nitride-based semiconductor wafer is provided that includes a substrate with a central region and a peripheral edge region. One or more intermediate layers may be optionally provided selected from a buffer layer, a seed layer, or a transition layer. A peripheral edge feature is formed in or on a peripheral edge region of the substrate or the transition layer, with one or more peripheral edge passivation layers or peripheral edge surface texturing. The peripheral edge feature extends only around the peripheral edge and not in the central region. One or more III-nitride-based layers is positioned over the central region. In the central region, the III-nitride layer is an epitaxial layer while in the peripheral edge region, it is a polycrystalline layer. Stress due to lattice mismatches and differences in the coefficient of thermal expansion between the III-nitride layer and the substrate is relieved, minimizing defects.
    Type: Application
    Filed: April 2, 2021
    Publication date: February 2, 2023
    Inventors: Kye Jin LEE, Ke WANG, Wen-Yuan HSIEH, Xinhua LI
  • Publication number: 20220375876
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from wide to narrow with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: April 12, 2021
    Publication date: November 24, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220376053
    Abstract: Embodiments of the present application disclose a semiconductor device and a manufacturing method thereof. The semiconductor device includes a semiconductor layer, a first doped nitride semiconductor layer disposed on the semiconductor layer, and a second doped nitride semiconductor layer disposed on the first doped nitride semiconductor layer. The semiconductor device further includes an undoped nitride semiconductor layer between the semiconductor layer and the first doped nitride semiconductor layer. The undoped nitride semiconductor layer has a first surface in contact with the semiconductor layer and a second surface in contact with the first doped nitride semiconductor layer.
    Type: Application
    Filed: June 4, 2020
    Publication date: November 24, 2022
    Inventors: KING YUEN WONG, KYE JIN LEE
  • Publication number: 20220328679
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer is disposed on the substrate. The buffer layer includes a III-V compound which includes a first element. The buffer layer is disposed on the nucleation layer. The buffer layer has a variable concentration of the first element that decrementally decreases and then incrementally increases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328425
    Abstract: A semiconductor device includes a nucleation layer, a first buffer layer, a first nitride-based semiconductor layer, and a second buffer layer. The nucleation layer includes a compound which includes a first element. The first buffer layer includes a III-V compound which includes the first element. A concentration of the first element varies with respect to a first reference point within the first buffer layer. The first nitride-based semiconductor layer is disposed on the first buffer layer. The second buffer layer includes a III-V compound which includes a second element different than the first element. The second buffer layer is disposed on and forms an interface with the first nitride-based semiconductor layer. A concentration of the second element varies to cyclically oscillate as a function of a distance within a thickness of the second buffer layer, which occurs with respect to a second reference point within the second buffer layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328675
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. A first oscillation rate between a first reference point and a second reference point within the buffer layer is greater than a second oscillation rate between the second reference point and a third reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: July 20, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328680
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element cyclically oscillating with respect to first and second reference points within a buffer layer. The first and second reference points are respectively positioned at first and second distances from a top surface of the nucleation layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328674
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first group III element and is devoid of a second group III element. The buffer layer includes a III-V compound which includes the first and second group III elements. The buffer layer has an element ratio of the first group III element to the second group III element that decrementally decreases and then incrementally increases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328424
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first group III element and is devoid of a second group III element. The buffer layer includes a III-V compound which includes the first and second group III elements. The buffer layer has an element ratio of the first group III element to the second group III element that incrementally increases and then decrementally decreases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328676
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. A first oscillation rate between a first reference point and a second reference point within the buffer layer is less than a second oscillation rate between the second reference point and a third reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: July 20, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN