Abstract: A nonvolatile memory device comprises floating gates formed over an active region of a semiconductor substrate, isolation layers formed within respective isolation regions of the semiconductor substrate, first nitridation patterns formed on sidewalls of the floating gates, a first insulating layer, a second nitride layer, a second insulating layer, and a third nitride layer formed on an entire surface of the first nitridation patterns and the isolation layers, and control gates formed over the third nitride layer.

Abstract: A flash memory device comprises a first group of dummy memory cells disposed between source selection transistors, which are coupled to a source selection line, and memory cells coupled to a first wordline. The flash memory device further comprises a second group of dummy memory cells disposed between drain selection transistors, which are coupled to a drain selection line, and memory cells coupled to the last wordline. The flash memory device is configured to prevent program disturbance in deselected cell strings and degradation of programming/erasing speeds in a selected cell string.

Abstract: A method for forming metal interconnection of semiconductor device is disclosed. In the present invention, an aluminum layer in the 10 to 100 .ANG. range is deposited on the bottom of the contact before or after the deposition of a titanium layer for barrier metal, which forms TiAl.sub.3 by the reaction of titanium and aluminum. According to the invention, stable contact resistance and low leakage current can be obtained in the application of ultra shallow junction.

Abstract: A method for forming a barrier metal layer of semiconductor device is disclosed. According to the present invention, pre-cleaning, oxygen plasma treatment and formation of barrier metal layer are performed by in-situ type in one same conventional chamber. This method results in the reduction of cost and process time.

Abstract: The present invention discloses a method of manufacturing a semiconductor device, comprising the steps of: forming a transistor on a silicon substrate; forming a trench by etching a selected portion of the silicon substrate; and forming an interlayer insulating film on the resulting structure after forming said trench, thereby forming a device isolation film in the trench.