Patents by Inventor Kyeong Seok Kim

Kyeong Seok Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11861230
    Abstract: An operating method of a controller that controls a memory device includes initializing a clock frequency set corresponding to clock signals provided to a plurality of operation modules included in the controller when a change in a current performance or a change in a host request pattern is detected, determining a target performance on the basis of the current performance given after the clock frequency set is initialized, determining an optimal clock frequency set, in which the current performance is able to be maintained equal to or greater than the target performance, by repeatedly performing an operation of changing at least one clock frequency included in the clock frequency set and an operation of monitoring the current performance given after the clock frequency is changed, and providing the plurality of operation modules with clock signals according to the optimal clock frequency set.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: January 2, 2024
    Assignee: SK hynix Inc.
    Inventors: Kyeong Seok Kim, Jin Soo Kim, Su Ik Park, Yong Joon Joo
  • Publication number: 20230244607
    Abstract: Provided herein is a memory controller for controlling a memory device. The memory controller includes a workload detector configured to determine a change in workload based on reception of a changed request from a host or a change in clock received from an external device, a device performance controller configured to determine, if the workload is determined as changed, read performance based on a ratio of a size of data output to the host to a size of data requested from the host every preset period and configured to output a read-look-ahead (RLA) command to the memory device based on the determined read performance, a buffer memory configured to store data read from the memory device in response to the RLA command and a memory size controller configured to control a size of the buffer memory. The RLA command instructs to output data which is frequently requested from the host.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Inventors: Na Young LEE, Ku Ik KWON, Kyeong Seok KIM, Byong Woo RYU
  • Patent number: 11650924
    Abstract: Provided herein is a memory controller for controlling a memory device. The memory controller includes a workload detector configured to determine a change in workload based on reception of a changed request from a host or a change in clock received from an external device, a device performance controller configured to determine, if the workload is determined as changed, read performance based on a ratio of a size of data output to the host to a size of data requested from the host every preset period and configured to output a read-look-ahead (RLA) command to the memory device based on the determined read performance, a buffer memory configured to store data read from the memory device in response to the RLA command and a memory size controller configured to control a size of the buffer memory. The RLA command instructs to output data which is frequently requested from the host.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: May 16, 2023
    Assignee: SK hynix Inc.
    Inventors: Na Young Lee, Ku Ik Kwon, Kyeong Seok Kim, Byong Woo Ryu
  • Patent number: 11640263
    Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may include a plurality of cores, a control core, and a shared memory. When processing the event, the control core may select a first core executing a target job requiring distributed execution among the plurality of cores, and the first core may run a first firmware among the plurality of firmwares to execute the target job. The control core may select a second core to execute the target job together with the first core, and may control the second core to run the first firmware. The control core may control the first core and the second core to perform distributed execution of the target job.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: May 2, 2023
    Assignee: SK hynix Inc.
    Inventors: Su Ik Park, Ku Ik Kwon, Kyeong Seok Kim, Yong Joon Joo
  • Patent number: 11586239
    Abstract: Electronic devices are disclosed. In some implementations, an electronic device includes a device interface to provide an interface to a host and detect link information associated with a bandwidth provided by the device interface in communicating with the host, a processor coupled to the device interface to be in communication with the host, and structured to be operable to control operations of the electronic device in response to a request received from the host through the device interface, and a clock generator coupled to provide the device interface and the processor with clock signals to be used to operate the device interface and the processor. The processor is configured to adjust frequencies of the clock signals based on the link information.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: February 21, 2023
    Assignee: SK hynix Inc.
    Inventors: Ku Ik Kwon, Kyeong Seok Kim, Su Ik Park, Yong Joon Joo
  • Patent number: 11550375
    Abstract: Embodiments of the present disclosure relate to a storage system and an operating method thereof. According to the embodiments of the present disclosure, the storage system may include N (N is a natural number) temperature sensors and M (M is a natural number of 2 or more) modules, and may determine a thermal throttling level for each of the M modules based on N temperature information pieces collected from the N temperature sensors and N weights corresponding to the N temperature sensors, wherein the N weights are different for each of the M modules, and the storage system may perform the thermal throttling for the M modules based on the thermal throttling levels for the M modules respectively.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: January 10, 2023
    Assignee: SK hynix Inc.
    Inventors: Yong Joon Joo, Ku Ik Kwon, Kyeong Seok Kim, Byong Woo Ryu
  • Publication number: 20220334769
    Abstract: An operating method of a controller that controls a memory device includes initializing a clock frequency set corresponding to clock signals provided to a plurality of operation modules included in the controller when a change in a current performance or a change in a host request pattern is detected, determining a target performance on the basis of the current performance given after the clock frequency set is initialized, determining an optimal clock frequency set, in which the current performance is able to be maintained equal to or greater than the target performance, by repeatedly performing an operation of changing at least one clock frequency included in the clock frequency set and an operation of monitoring the current performance given after the clock frequency is changed, and providing the plurality of operation modules with clock signals according to the optimal clock frequency set.
    Type: Application
    Filed: December 27, 2021
    Publication date: October 20, 2022
    Inventors: Kyeong Seok KIM, Jin Soo KIM, Su Ik PARK, Yong Joon JOO
  • Patent number: 11460906
    Abstract: An electronic device includes a plurality of cores, and a clock generator configured to provide a plurality of clock signals to the plurality of cores, respectively, wherein the plurality of cores includes a system core that controls the clock generator to generate the clock signals having frequencies of the respective cores, wherein the frequencies are optimized and determined based on a type of an event of the electronic device, and wherein to clock signals with optimized frequencies are applied to the respective cores in order to perform the event.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: October 4, 2022
    Assignee: SK hynix Inc.
    Inventors: Ku Ik Kwon, Kyeong Seok Kim, Su Ik Park, Yong Joon Joo
  • Publication number: 20220269610
    Abstract: Provided herein is a memory controller for controlling a memory device. The memory controller includes a workload detector configured to determine a change in workload based on reception of a changed request from a host or a change in clock received from an external device, a device performance controller configured to determine, if the workload is determined as changed, read performance based on a ratio of a size of data output to the host to a size of data requested from the host every preset period and configured to output a read-look-ahead (RLA) command to the memory device based on the determined read performance, a buffer memory configured to store data read from the memory device in response to the RLA command and a memory size controller configured to control a size of the buffer memory. The RLA command instructs to output data which is frequently requested from the host.
    Type: Application
    Filed: July 27, 2021
    Publication date: August 25, 2022
    Inventors: Na Young LEE, Ku Ik KWON, Kyeong Seok KIM, Byong Woo RYU
  • Publication number: 20220164012
    Abstract: Embodiments of the present disclosure relate to a storage system and an operating method thereof. According to the embodiments of the present disclosure, the storage system may include N (N is a natural number) temperature sensors and M (M is a natural number of 2 or more) modules, and may determine a thermal throttling level for each of the M modules based on N temperature information pieces collected from the N temperature sensors and N weights corresponding to the N temperature sensors, wherein the N weights are different for each of the M modules, and the storage system may perform the thermal throttling for the M modules based on the thermal throttling levels for the M modules respectively.
    Type: Application
    Filed: April 15, 2021
    Publication date: May 26, 2022
    Inventors: Yong Joon JOO, Ku Ik KWON, Kyeong Seok KIM, Byong Woo RYU
  • Publication number: 20220107759
    Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may include a plurality of cores, a control core and a shared memory, and the control core may, when processing the event, select a first core executing a target job requiring distributed execution among the plurality of cores—the first core runs a first firmware among the plurality of firmwares to execute the target job—may select a second core executing the target job together with the first core, may control the second core to run the first firmware, and may control the first core and the second core to perform distributed execution of the target job.
    Type: Application
    Filed: March 3, 2021
    Publication date: April 7, 2022
    Inventors: Su Ik PARK, Ku Ik KWON, Kyeong Seok KIM, Yong Joon JOO
  • Publication number: 20220083115
    Abstract: An electronic device includes a plurality of cores, and a clock generator configured to provide a plurality of clock signals to the plurality of cores, respectively, wherein the plurality of cores includes a system core that controls the clock generator to generate the clock signals having frequencies of the respective cores, wherein the frequencies are optimized and determined based on a type of an event of the electronic device, and wherein to clock signals with optimized frequencies are applied to the respective cores in order to perform the event.
    Type: Application
    Filed: February 18, 2021
    Publication date: March 17, 2022
    Inventors: Ku Ik KWON, Kyeong Seok KIM, Su Ik PARK, Yong Joon JOO
  • Publication number: 20220057827
    Abstract: Electronic devices are disclosed. In some implementations, an electronic device includes a device interface to provide an interface to a host and detect link information associated with a bandwidth provided by the device interface in communicating with the host, a processor coupled to the device interface to be in communication with the host, and structured to be operable to control operations of the electronic device in response to a request received from the host through the device interface, and a clock generator coupled to provide the device interface and the processor with clock signals to be used to operate the device interface and the processor. The processor is configured to adjust frequencies of the clock signals based on the link information.
    Type: Application
    Filed: June 22, 2021
    Publication date: February 24, 2022
    Inventors: Ku Ik KWON, Kyeong Seok KIM, Su Ik PARK, Yong Joon JOO
  • Patent number: 11092610
    Abstract: A biomarker and a technology for utilizing the same, of the present invention, can be useful in the early diagnosis, in urine, of a renal function abnormality due to diabetes and drugs and in the prediction and evaluation of disease severity, and, further, can accurately determine, with high sensitivity and specificity, a renal function abnormality due to diabetes and exposure to drugs, and enable the early and effective diagnosis of kidney abnormality symptoms through a relatively simple method, thereby being widely usable in various fields, such as in clinical experiments essential for new drug development and in diagnosing drug-causing acute/chronic renal failure, which can frequently occur in the clinical treatment process.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: August 17, 2021
    Inventors: Byung Mu Lee, Hyung Sik Kim, Kyeong Seok Kim, Ji Yeon Son
  • Publication number: 20190277859
    Abstract: A biomarker and a technology for utilizing the same, of the present invention, can be useful in the early diagnosis, in urine, of a renal function abnormality due to diabetes and drugs and in the prediction and evaluation of disease severity, and, further, can accurately determine, with high sensitivity and specificity, a renal function abnormality due to diabetes and exposure to drugs, and enable the early and effective diagnosis of kidney abnormality symptoms through a relatively simple method, thereby being widely usable in various fields, such as in clinical experiments essential for new drug development and in diagnosing drug-causing acute/chronic renal failure, which can frequently occur in the clinical treatment process.
    Type: Application
    Filed: August 16, 2017
    Publication date: September 12, 2019
    Inventors: Byung Mu LEE, Hyung Sik KIM, Kyeong Seok KIM, Ji Yeon SON
  • Patent number: 8370196
    Abstract: The present invention relates to apparatus and method of providing a multimedia advertising service through a mobile communication network. In the present invention, a content server downloads ad contents to a mobile terminal along with content-displaying condition and the mobile terminal having received the ad contents displays the received ad contents according to the content-displaying condition when an event specified by the content-displaying condition occurs. Afterwards, a content-displayed history is uploaded to the content server by the mobile terminal.
    Type: Grant
    Filed: March 22, 2003
    Date of Patent: February 5, 2013
    Assignee: SK Planet Co., Ltd.
    Inventors: Min Ju Choi, Kyeong Seok Kim, Jong Woo Choi, Jun Hyung Kim, Sung Cheol Hong, Eon Hwa Jeong, Gi Seon Nam
  • Publication number: 20060285510
    Abstract: A method and an apparatus to transfer a frame in an extended wireless local area network (LAN) environment into which wireless access points are introduced, the method including: grouping the wireless access points; receiving a frame; detecting destination address information from the frame; comparing the destination address information to address information of the wireless access points belonging to a group; and transmitting the frame to a wireless access point if the destination address information is identical to the address information of the wireless access points belonging to the group, to promote preventing a broadcast storm where a broadcast frame is repeatedly transmitted in a loop.
    Type: Application
    Filed: April 17, 2006
    Publication date: December 21, 2006
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min-soo Kim, Song-yean Cho, Ji-young Kong, Kyeong-seok Kim