Patents by Inventor Kyeong Woo JANG

Kyeong Woo JANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ENCODING/DECODING APPARATUS FOR PROCESSING CHANNEL SIGNAL AND METHOD THEREFOR
    Publication number: 20240119949
    Abstract: An encoding/decoding apparatus and method for controlling a channel signal is disclosed, wherein the encoding apparatus may include an encoder to encode an object signal, a channel signal, and rendering information for the channel signal, and a bit stream generator to generate, as a bit stream, the encoded object signal, the encoded channel signal, and the encoded rendering information for the channel signal.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 11, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jeong Il SEO, Seung Kwon BEACK, Dae Young JANG, Kyeong Ok KANG, Tae Jin PARK, Yong Ju LEE, Keun Woo CHOI, Jin Woong KIM
  • Display device
    Patent number: 11610957
    Abstract: A display device includes a first thin film transistor disposed on a substrate. A first insulating interlayer covers the first thin film transistor. An active pattern is disposed on the first insulating interlayer. The active pattern includes indium-gallium-zinc oxide (IGZO) having a thickness in a range of about 150 ? to about 400 ?. A gate insulation layer covers the active pattern. A gate pattern is disposed on the gate insulation layer. A second insulating interlayer covers the gate pattern.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: March 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Tetsuhiro Tanaka, Yeong-Gyu Kim, Tae Sik Kim, Hee Yeon Kim, Ki Seong Seo, Seung Hyun Lee, Kyeong Woo Jang, Sug Woo Jung
  • DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20210257426
    Abstract: A display device includes a first thin film transistor disposed on a substrate. A first insulating interlayer covers lire first thin film transistor. An active pattern is disposed on the first insulating interlayer. The active pattern includes indium-gallium-zinc oxide (IGZO) having a thickness in a range of about 150 ? to about 400 ?. A gate insulation layer covers the active pattern A gate pattern is disposed on the gate insulation layer. A second insulating interlayer covers the gate pattern.
    Type: Application
    Filed: January 28, 2021
    Publication date: August 19, 2021
    Inventors: Tetsuhiro TANAKA, Yeong-Gyu KIM, Tae Sik KIM, Hee Yeon KIM, Ki Seong SEO, Seung Hyun LEE, Kyeong Woo JANG, Sug Woo JUNG