Patents by Inventor Kyeongkeun Kang
Kyeongkeun Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11916565Abstract: An analog-to-digital converter is provided. The analog-to-digital converter includes: a sample/hold circuit; a digital-to-analog converter; a plurality of comparison circuits; a control logic; and a digital register, wherein the plurality of comparison circuits include: a first comparison circuit configured to output a first comparison result signal in a first operation period; a second comparison circuit configured to, in a second operation period, calibrate an offset of a second comparison result signal based on a reference signal corresponding to the first comparison result signal among a plurality of reference signals and output the calibrated second comparison result signal; and a third comparison circuit configured to, in a third operation period, calibrate an offset of a third comparison result signal based on a reference signal corresponding to the calibrated second comparison result signal and output the calibrated third comparison result signal.Type: GrantFiled: February 16, 2022Date of Patent: February 27, 2024Assignees: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jaerin Lee, Minjae Lee, Sewon Lee, Kyeongkeun Kang
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Publication number: 20230344417Abstract: A semiconductor device is provided. The semiconductor device includes: an equalizer circuit configured to output a first control signal corresponding to a first bit of original two-bit data and a second control signal corresponding to a second bit of the original two-bit data; and a driver circuit including a plurality of pull-up transistors connected between an output node and a first power node configured to provide a first power supply voltage, and a plurality of pull-down transistors connected between the output node and a second power node configured to provide a second power supply voltage, wherein the second power supply voltage is lower than the first power supply voltage, and the driver circuit is connected to the equalizer circuit in series.Type: ApplicationFiled: December 22, 2022Publication date: October 26, 2023Applicants: SAMSUNG ELECTRONICS CO., LTD., Korea University Research and Business FoundationInventors: Kwanyeob CHAE, Chulwoo KIM, Yoonjae CHOI, Kyeongkeun KANG
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Patent number: 11711091Abstract: An analog-to-digital converter, including a sample/hold circuit; a reference voltage driver; a digital-to-analog converter; a comparator; and a logic circuit, wherein the reference voltage driver includes: a first voltage supplier circuit configured to output an external supply voltage provided from outside of the analog-to-digital converter; a second voltage supplier circuit configured to output a sampled reference voltage that is obtained during a sampling phase based on control signals received from the logic circuit; and a switching driver configured to electrically connect the first voltage supplier circuit to the digital-to-analog converter during a first conversion phase after the sampling phase based on the control signals received from the logic circuit, and to electrically connect the second voltage supplier circuit to the digital-to-analog converter during a second conversion phase based on the control signals received from the logic circuit.Type: GrantFiled: February 18, 2022Date of Patent: July 25, 2023Assignees: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jaerin Lee, Minjae Lee, Hyungyu Ju, Kyeongkeun Kang
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Publication number: 20230011449Abstract: An apparatus and a method of correcting a mismatch of a time-interleaved analog-to-digital converter are provided. The apparatus may include: a time-interleaved analog-to-digital converter configured to receive a non-return-to-zero (NRZ) signal in a correction mode and generate a first output signal, and including a plurality of analog-to-digital converters; and a mismatch corrector configured to generate a second output signal by processing the first output signal of the time-interleaved analog-to-digital converter based on parameters, wherein the parameters may be generated based on the first output signal of the time-interleaved analog-to-digital converter in the correction mode, and a period of the NRZ signal may be different from a product of a sampling period of the time-interleaved analog-to-digital converter and a number of the plurality of analog-to-digital converters included in the time-interleaved analog-to-digital converter.Type: ApplicationFiled: July 12, 2022Publication date: January 12, 2023Applicants: Samsung Electronics Co., Ltd., Gwangju Institute of Science and TechnologyInventors: Jaerin Lee, Yang Azevedo Tavares, Minjae Lee, Kyeongkeun Kang
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Publication number: 20230011062Abstract: An analog-to-digital converter is provided. The analog-to-digital converter includes: a sample/hold circuit; a digital-to-analog converter; a plurality of comparison circuits; a control logic; and a digital register, wherein the plurality of comparison circuits include: a first comparison circuit configured to output a first comparison result signal in a first operation period; a second comparison circuit configured to, in a second operation period, calibrate an offset of a second comparison result signal based on a reference signal corresponding to the first comparison result signal among a plurality of reference signals and output the calibrated second comparison result signal; and a third comparison circuit configured to, in a third operation period, calibrate an offset of a third comparison result signal based on a reference signal corresponding to the calibrated second comparison result signal and output the calibrated third comparison result signal.Type: ApplicationFiled: February 16, 2022Publication date: January 12, 2023Applicants: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jaerin LEE, Minjae LEE, Sewon LEE, Kyeongkeun KANG
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Publication number: 20220407534Abstract: An analog-to-digital converter, including a sample/hold circuit; a reference voltage driver; a digital-to-analog converter; a comparator; and a logic circuit, wherein the reference voltage driver includes: a first voltage supplier circuit configured to output an external supply voltage provided from outside of the analog-to-digital converter; a second voltage supplier circuit configured to output a sampled reference voltage that is obtained during a sampling phase based on control signals received from the logic circuit; and a switching driver configured to electrically connect the first voltage supplier circuit to the digital-to-analog converter during a first conversion phase after the sampling phase based on the control signals received from the logic circuit, and to electrically connect the second voltage supplier circuit to the digital-to-analog converter during a second conversion phase based on the control signals received from the logic circuit.Type: ApplicationFiled: February 18, 2022Publication date: December 22, 2022Applicants: SAMSUNG ELECTRONICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jaerin LEE, Minjae Lee, Hyungyu Ju, Kyeongkeun Kang