Patents by Inventor Kyohei Mizuta

Kyohei Mizuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250063243
    Abstract: There is provided a light detecting device that can suppress corrosion of optical elements while suppressing upper layer color mixing. The light detecting device includes: a substrate on which a plurality of photoelectric conversion units are formed; a plurality of optical elements that are disposed on a rear surface side of the substrate; and a microlens array that is disposed on a rear surface side of the plurality of optical elements, and includes a plurality of microlenses. Furthermore, the optical element contains a metal material, and a surface on an optical element side of the microlens array is formed in contact with the rear surfaces of the optical elements so as to cover the rear surfaces and also serve as a protection film that suppresses corrosion of the metal material of the optical elements.
    Type: Application
    Filed: November 16, 2022
    Publication date: February 20, 2025
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yutaro KOMURO, Yoshiki EBIKO, Tomohiro YAMAZAKI, Kyohei MIZUTA
  • Publication number: 20250031477
    Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.
    Type: Application
    Filed: October 2, 2024
    Publication date: January 23, 2025
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
  • Publication number: 20250006764
    Abstract: Improvement of pixel characteristics is achieved. A light detecting device includes a semiconductor layer and first and second separation areas disposed in the semiconductor layer. The first separation area includes an insulating film that fills a first dug part extending in a thickness direction of the semiconductor layer and of which a refractive index is lower than that of the semiconductor layer, and the second separation area includes a conductive film filling a second dug part extending in the thickness direction of the semiconductor layer.
    Type: Application
    Filed: November 25, 2022
    Publication date: January 2, 2025
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kyohei MIZUTA, Yoshiki EBIKO, Yasufumi MIYOSHI, Kenji TAKEO, Tokihisa KANEGUCHI, Hokuto MIKI, Yoshiki SHIRASU, Tadamasa SHIOYAMA, Toshihiko HAYASHI, Naoyuki SATO
  • Patent number: 12142626
    Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: November 12, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tomomi Ito, Kazuyoshi Yamashita, Atsushi Masagaki, Shinobu Asayama, Shinya Itoh, Haruyuki Nakagawa, Kyohei Mizuta, Susumu Ooki, Osamu Oka, Kazuto Kamimura, Takuji Matsumoto, Kenju Nishikido
  • Publication number: 20240371899
    Abstract: Light interference is suppressed. A light detection device includes: a semiconductor layer that has a photoelectric conversion region which photoelectrically converts incident light; and an optical element that has a metal film and an aperture arrangement formed in the metal film, selects specific light, supplies the selected light to the photoelectric conversion region, and is disposed to overlap the photoelectric conversion region in a plan view, wherein the photoelectric conversion region on a side of the optical element has an uneven portion.
    Type: Application
    Filed: March 4, 2022
    Publication date: November 7, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomohiro YAMAZAKI, Kyohei MIZUTA
  • Patent number: 12125740
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Grant
    Filed: November 2, 2023
    Date of Patent: October 22, 2024
    Assignee: SONY GROUP CORPORATION
    Inventor: Kyohei Mizuta
  • Publication number: 20240213282
    Abstract: A light detection device capable of supplementing a sensitivity drop includes: a semiconductor layer having a photoelectric conversion area; and an optical element supplying light having a polarization plane according to an arrangement direction of the opening parts. The optical element includes a first area in which the opening parts are arranged in a first direction and a second area in which the opening parts are arranged in a second direction. A light incidence face of a first photoelectric conversion area includes a plurality of concave parts arranged at a first angle with the first direction or a groove extending in this direction, and an uneven part of a second photoelectric conversion area includes a plurality of concave parts at the first angle with the second direction or a groove extending in this direction.
    Type: Application
    Filed: March 4, 2022
    Publication date: June 27, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yuta KUSHIDA, Kyohei MIZUTA, Atsushi TODA
  • Patent number: 11942502
    Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kyohei Mizuta
  • Publication number: 20240063054
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Application
    Filed: November 2, 2023
    Publication date: February 22, 2024
    Inventor: KYOHEI MIZUTA
  • Publication number: 20240047499
    Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.
    Type: Application
    Filed: October 20, 2023
    Publication date: February 8, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kyohei MIZUTA
  • Publication number: 20230393249
    Abstract: A sensor device according to the present technology includes: a semiconductor substrate; and a wiring layer part formed on the semiconductor substrate and having a plurality of wiring layers, in which a pixel is disposed in a laminated structure of the semiconductor substrate and the wiring layer part, the pixel including a photoelectric conversion element that performs photoelectric conversion, a first charge holding part and a second charge holding part that hold charges accumulated in the photoelectric conversion element, a first transfer transistor that transfers the charges to the first charge holding part, and a second transfer transistor that transfers the charges to the second charge holding part, and a shield part is disposed to surround each gate wiring line of each of the first and second transfer transistors extending in a thickness direction in the wiring layer part.
    Type: Application
    Filed: October 7, 2021
    Publication date: December 7, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kyohei MIZUTA, Hajime YAMAGISHI
  • Patent number: 11830766
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: November 28, 2023
    Assignee: SONY GROUP CORPORATION
    Inventor: Kyohei Mizuta
  • Patent number: 11791200
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: October 17, 2023
    Assignee: SONY GROUP CORPORATION
    Inventor: Kyohei Mizuta
  • Patent number: 11532762
    Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: December 20, 2022
    Assignee: SONY CORPORATION
    Inventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
  • Publication number: 20220139992
    Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 5, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
  • Publication number: 20220084872
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Inventor: Kyohei MIZUTA
  • Publication number: 20220059397
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Inventor: KYOHEI MIZUTA
  • Patent number: 11189520
    Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: November 30, 2021
    Assignee: SONY CORPORATION
    Inventor: Kyohei Mizuta
  • Publication number: 20210184060
    Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.
    Type: Application
    Filed: January 19, 2021
    Publication date: June 17, 2021
    Applicant: Sony Corporation
    Inventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
  • Publication number: 20210057479
    Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.
    Type: Application
    Filed: January 18, 2019
    Publication date: February 25, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kyohei MIZUTA