Patents by Inventor Kyohei Mizuta
Kyohei Mizuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942502Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.Type: GrantFiled: January 18, 2019Date of Patent: March 26, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Kyohei Mizuta
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Publication number: 20240063054Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.Type: ApplicationFiled: November 2, 2023Publication date: February 22, 2024Inventor: KYOHEI MIZUTA
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Publication number: 20240047499Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.Type: ApplicationFiled: October 20, 2023Publication date: February 8, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Kyohei MIZUTA
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Publication number: 20230393249Abstract: A sensor device according to the present technology includes: a semiconductor substrate; and a wiring layer part formed on the semiconductor substrate and having a plurality of wiring layers, in which a pixel is disposed in a laminated structure of the semiconductor substrate and the wiring layer part, the pixel including a photoelectric conversion element that performs photoelectric conversion, a first charge holding part and a second charge holding part that hold charges accumulated in the photoelectric conversion element, a first transfer transistor that transfers the charges to the first charge holding part, and a second transfer transistor that transfers the charges to the second charge holding part, and a shield part is disposed to surround each gate wiring line of each of the first and second transfer transistors extending in a thickness direction in the wiring layer part.Type: ApplicationFiled: October 7, 2021Publication date: December 7, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kyohei MIZUTA, Hajime YAMAGISHI
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Patent number: 11830766Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.Type: GrantFiled: November 8, 2021Date of Patent: November 28, 2023Assignee: SONY GROUP CORPORATIONInventor: Kyohei Mizuta
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Patent number: 11791200Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.Type: GrantFiled: November 29, 2021Date of Patent: October 17, 2023Assignee: SONY GROUP CORPORATIONInventor: Kyohei Mizuta
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Patent number: 11532762Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.Type: GrantFiled: January 19, 2021Date of Patent: December 20, 2022Assignee: SONY CORPORATIONInventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
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Publication number: 20220139992Abstract: There is provided an image sensor including a first substrate including a plurality of pixels and a plurality of vertical signal lines and a plurality of first wiring layers and a second substrate including a plurality of second wiring layers. The first and second substrates are secured together between the pluralities of first and second wiring layers. First pads are provided between one of the plurality of first wiring layers and one of the plurality of second wiring layers and second pads are provided between another of the plurality of first wiring layers and another of the plurality of second wiring layers. First vias and second vias connect the first pads and the one of the plurality of first wiring layers and the one of the plurality of second wiring layers together.Type: ApplicationFiled: February 28, 2020Publication date: May 5, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tomomi ITO, Kazuyoshi YAMASHITA, Atsushi MASAGAKI, Shinobu ASAYAMA, Shinya ITOH, Haruyuki NAKAGAWA, Kyohei MIZUTA, Susumu OOKI, Osamu OKA, Kazuto KAMIMURA, Takuji MATSUMOTO, Kenju NISHIKIDO
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Publication number: 20220084872Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.Type: ApplicationFiled: November 29, 2021Publication date: March 17, 2022Inventor: Kyohei MIZUTA
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Publication number: 20220059397Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.Type: ApplicationFiled: November 8, 2021Publication date: February 24, 2022Inventor: KYOHEI MIZUTA
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Patent number: 11189520Abstract: The present technology relates to an imaging device capable of preventing a decrease of sensitivity of the imaging device in a case where a capacitance element is provided in a pixel, a method of manufacturing an imaging device, and an electronic device. The imaging device includes, in a pixel, a photoelectric conversion element and a capacitance element accumulating an electric charge generated by the photoelectric conversion element. The capacitance element includes a first electrode including a plurality of trenches, a plurality of second electrodes each having a cross-sectional area smaller than a contact connected to a gate electrode of a transistor in the pixel, and buried in each of the trenches, and a first insulating film disposed between the first electrode and the second electrode in each of the trenches. The present technology can be applied, for example, to a backside irradiation-type CMOS image sensor.Type: GrantFiled: March 17, 2017Date of Patent: November 30, 2021Assignee: SONY CORPORATIONInventor: Kyohei Mizuta
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Publication number: 20210184060Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.Type: ApplicationFiled: January 19, 2021Publication date: June 17, 2021Applicant: Sony CorporationInventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
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Publication number: 20210057479Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.Type: ApplicationFiled: January 18, 2019Publication date: February 25, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Kyohei MIZUTA
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Patent number: 10923607Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.Type: GrantFiled: June 4, 2020Date of Patent: February 16, 2021Assignee: Sony CorporationInventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
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Publication number: 20200357938Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.Type: ApplicationFiled: June 4, 2020Publication date: November 12, 2020Applicant: Sony CorporationInventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
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Patent number: 10812746Abstract: Provided is a solid-state imaging device including: an effective pixel region of a substrate, effective pixels being arranged in the effective pixel region; an interconnection region around the effective pixel region, electrodes or interconnects being provided in the interconnection region; a peripheral region outside the interconnection region; and a film formed on the substrate. A cross-sectional height of the film in the effective pixel region is smaller than a cross-sectional height of the film in the interconnection region, and a cross-sectional height of the film in the peripheral region and a cross-sectional height of the film in at least a portion of a middle region between the effective pixel region and the interconnection region, the portion being closer to the interconnection region, are between the cross-sectional height of the film in the effective pixel region and the cross-sectional height of the film in the interconnection region.Type: GrantFiled: February 6, 2018Date of Patent: October 20, 2020Assignee: Sony CorporationInventors: Yoshiaki Masuda, Kazufumi Watanabe, Kyohei Mizuta, Keishi Inoue, Hirohisa Uchida
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Patent number: 10756218Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.Type: GrantFiled: October 23, 2019Date of Patent: August 25, 2020Assignee: Sony CorporationInventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba
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Patent number: 10692910Abstract: The present disclosure relates to a solid-state imaging element capable of suppressing stray light with respect to a charge storage unit such as an FD, and an electronic device. According to an aspect of the present disclosure, a solid-state imaging element constituted by many pixels includes a photoelectric conversion unit formed for each of the pixels and that converts incident light into a charge; a charge storage unit that temporarily holds the converted charge; and a first light shielding unit formed between the pixels and having a predetermined length in a thickness direction of a substrate. The charge storage unit is formed below a cross portion where the first light shielding unit formed between pixels adjacent to each other in a longitudinal direction crosses the first light shielding unit formed between pixels adjacent to each other in a lateral direction. The present disclosure can be applied to, for example, a backside irradiation type CMOS image sensor.Type: GrantFiled: March 1, 2017Date of Patent: June 23, 2020Assignee: SONY CORPORATIONInventors: Kyohei Mizuta, Takuya Maruyama, Yukihiro Ando
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Patent number: 10651229Abstract: The present disclosure relates to a solid-state image device, a method for manufacturing the solid-state image device, and an electronic device that are capable of reducing uneven application of a color filter. A color filter and a plurality of connection unit areas are formed on a sensor board. At least one of the connection unit areas is placed a predetermined interval away from the other connection unit areas. The present disclosure can be applied, for example, to a backside illumination CMOS image sensor with a layer structure, a front-side illumination CMOS image sensor with a layer structure, or a CCD image sensor.Type: GrantFiled: February 24, 2015Date of Patent: May 12, 2020Assignee: SONY CORPORATIONInventors: Yoshiaki Masuda, Kyohei Mizuta, Keishi Inoue, Akira Shinozaki
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Publication number: 20200058809Abstract: A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus.Type: ApplicationFiled: October 23, 2019Publication date: February 20, 2020Applicant: Sony CorporationInventors: Kyohei Mizuta, Tomokazu Ohchi, Yohei Chiba