Abstract: An arithmetic device includes a first register that stores input data as values of a plurality of input neurons, a plurality of ports, and a plurality of processing element groups that correspond to the plurality of ports, respectively, and can access the first register through the respective corresponding ports. Each processing element group includes a plurality of processing elements. Each processing element is associated with at least one of a plurality of output neurons and performs a multiply-and-accumulate computation in which a value of at least one input neuron connected to a corresponding output neuron is multiplied by a weight coefficient and results of multiplication are accumulated.