Abstract: The multilayer system of this invention is characterized by the process when a first master such as a CPU to which a clock signal is constantly supplied from a clock generator activates a second master. First, the first master outputs an activation signal for activating the second master to the second master through a slave corresponding to the second master. The second master is activated by the activation signal and outputs to the clock generator a clock request signal for requesting supply of a clock signal to the second master. The clock generator supplies a clock signal to the second master in response to the clock request signal.

Abstract: The bus system includes a plurality of masters, a plurality of slaves, and a multilayer switch. The bus system further includes an access control register to which access control information is set by a predetermined secure master. The multilayer switch includes switch master portions and switch slave portions. When a master accesses a slave, a switch master portion corresponding to a master different from the secure master determines whether the access is made to an access control area based on address information of an access destination and access control information stored in the access control register. If the switch master portion determines that the access is made to the access control area, it inhibits the access.

Abstract: The multilayer system of this invention is characterized by the process when a first master such as a CPU to which a clock signal is constantly supplied from a clock generator activates a second master. First, the first master outputs an activation signal for activating the second master to the second master through a slave corresponding to the second master. The second master is activated by the activation signal and outputs to the clock generator a clock request signal for requesting supply of a clock signal to the second master. The clock generator supplies a clock signal to the second master in response to the clock request signal.

Abstract: The multilayer system includes a multilayer switch which allows simultaneous processing of commands from a plurality of masters. The multilayer switch has a switch master portion corresponding to a master and a switch slave portion corresponding to a slave. The switch master portion outputs to a clock generator a clock request signal for supplying a clock signal to a switch slave portion corresponding to the slave specified by an address signal of the slave included in an access signal from a corresponding master. The clock generator supplies a clock signal to a switch slave portion corresponding to a slave to be accessed in response to the clock request signal.

Abstract: A piezoelectric element driving circuit for driving a plurality of piezoelectric elements disposed in a plurality of head units is disclosed, that comprises a plurality of power amplifiers for driving the plurality of head units, a plurality of flexible flat cables for connecting the plurality of head units and the plurality of power amplifiers, and a drive waveform signal generating circuit for supplying a drive waveform signal to the plurality of head units, wherein each of the plurality of head units has a switch device for supplying a piezoelectric element current to the plurality of piezoelectric elements, wherein the plurality of power amplifiers are disposed corresponding to the plurality of head units, the plurality of power amplifiers supplying a drive waveform signal that is input from the drive waveform signal generating circuit to the plurality of power amplifiers so as to drive the plurality of head units.

Abstract: In the present invention, the preliminary waveform driving region lies in the period in which the head is accelerated just after the head starts moving for printing until it reaches the printing starting position, and a preliminary waveform generated in the preliminary waveform driving region sways the ink in the opening of the nozzle of the head to the extent that ink is not discharged to reduce the viscosity of the ink, and the printing is performed in the usual printing region immediately after the head passes the preliminary waveform driving region. Accordingly, the head may be driven for printing before the viscosity of the ink, which is reduced by the preliminary driving motion, is increased so that ink may be more easily discharged from the nozzle when the head performs the printing.

Abstract: A piezoelectric element driving circuit for driving a plurality of piezoelectric elements disposed in a plurality of head units is disclosed, that comprises a plurality of power amplifiers for driving the plurality of head units, a plurality of flexible flat cables for connecting the plurality of head units and the plurality of power amplifiers, and a drive waveform signal generating circuit for supplying a drive waveform signal to the plurality of head units, wherein each of the plurality of head units has a switch device for supplying a piezoelectric element current to the plurality of piezoelectric elements, wherein the plurality of power amplifiers are disposed corresponding to the plurality of head units, the plurality of power amplifiers supplying a drive waveform signal that is input from the drive waveform signal generating circuit to the plurality of power amplifiers so as to drive the plurality of head units.

Abstract: Disclosed is a piezoelectric driving circuit which has: a first switching element and a first resistor, which are in series connected, being inserted between a high-potential side power source and a piezoelectric element; and a second switching element and a second resistor, which are in series connected, being inserted between a low-potential side power source and the piezoelectric element; wherein charging path is formed by turning on the first switching element and discharging path is formed by turning on the second switching element, so that a desired piezoelectric driving voltage waveform is produced.