Patents by Inventor Kyoichi Shiota

Kyoichi Shiota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5889703
    Abstract: Provided is a data read circuit that can execute data reading under a proper reference voltage in the event that element characteristics have been changed due to aged deterioration. When a sample memory cell (10a) is selected, a memory transistor (26a) in which no electrons are injected into its floating gate, enters ON state. At this time, a voltage (V.sub.22) is inputted to an input terminal (22) of a sense amplification (18), and a control circuit (13) detects the voltage (V.sub.22) to store it as a digital signal. On the other hand, when a sample memory cell (10b) is selected, a memory transistor (26b) in which electrons are injected into its floating gate, does not enter ON state. As a result, a voltage (V.sub.11) is inputted as it is, to the input terminal (22). The control circuit (13) detects the voltage (V.sub.11) to store it as a digital signal. Based on the two digital signals, the control circuit (13) sets a reference voltage (V.sub.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: March 30, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kyoichi Shiota, Terunori Kubo