Patents by Inventor Kyoichi Takenaka
Kyoichi Takenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240085246Abstract: To improve the temperature measurement accuracy in a circuit that measures temperature by using an operational amplifier. An operational amplifier outputs an output voltage corresponding to a difference between terminal voltages of a pair of input terminals. A resistor has one end connected to one of the pair of input terminals. A resistor-side rectification element is connected to another end of the resistor. A terminal-side rectification element is connected to the other one of the pair of input terminals. A switch connects an additional rectification element in parallel with either the resistor-side rectification element or the terminal-side rectification element. A current output section outputs a current corresponding to the output voltage.Type: ApplicationFiled: July 13, 2020Publication date: March 14, 2024Inventors: TAKURO KOSAKA, KYOICHI TAKENAKA
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Publication number: 20230362510Abstract: An imaging device according to an embodiment of the present disclosure includes: a plurality of current sources including first group current sources and second group current sources; and a control unit that controls driving of the first group current sources to generate a first-phase ramp voltage and controls driving of the first group current sources and at least one current source of the second group current sources to generate a second-phase ramp voltage.Type: ApplicationFiled: May 23, 2023Publication date: November 9, 2023Inventors: Tomoki Watanabe, Kyoichi Takenaka
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Patent number: 11716553Abstract: An imaging device according to an embodiment of the present disclosure includes: a plurality of current sources including first group current sources and second group current sources; and a control unit that controls driving of the first group current sources to generate a first-phase ramp voltage and controls driving of the first group current sources and at least one current source of the second group current sources to generate a second-phase ramp voltage.Type: GrantFiled: December 19, 2019Date of Patent: August 1, 2023Assignee: Sony Semiconductor Solution CorporationInventors: Tomoki Watanabe, Kyoichi Takenaka
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Publication number: 20230082419Abstract: The degree of freedom of an abnormality detection target location in a solid-state imaging device in which a plurality of substrates are joined is improved. A semiconductor device includes a connection line and a detection circuit. A plurality of semiconductor substrates are joined in the semiconductor device. Then, in the semiconductor device, the connection line is wired across the plurality of semiconductor substrates. The detection circuit detects the presence or absence of an abnormality in a joint surface of the plurality of semiconductor substrates based on an energization state of the connection line when enable has been set by a predetermined control signal.Type: ApplicationFiled: January 5, 2021Publication date: March 16, 2023Inventors: KEITA TAKEUCHI, SATOSHI YAMAMOTO, KYOICHI TAKENAKA, KEITA SASAKI
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Publication number: 20220070398Abstract: An imaging device according to an embodiment of the present disclosure includes: a plurality of current sources including first group current sources and second group current sources; and a control unit that controls driving of the first group current sources to generate a first-phase ramp voltage and controls driving of the first group current sources and at least one current source of the second group current sources to generate a second-phase ramp voltage.Type: ApplicationFiled: December 19, 2019Publication date: March 3, 2022Inventors: Tomoki Watanabe, Kyoichi Takenaka
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Publication number: 20160056797Abstract: According to one embodiment, a register circuit system includes a first register circuit, a step-down circuit, and a second register circuit. The step-down circuit generates a second power voltage from a first power voltage. The second power voltage is a power voltage of a potential level lower than the first power voltage. The second register circuit is supplied with the second power voltage from the step-down circuit. The first register circuit keeps holding data during a period of time in which the step-down circuit is stopping the generating of the second power voltage.Type: ApplicationFiled: July 9, 2015Publication date: February 25, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Takayoshi KIMURA, Kyoichi TAKENAKA
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Patent number: 7999574Abstract: According to one embodiment, a level conversion circuit includes an intermediate voltage generating portion to generate an intermediate voltage between a first voltage and a second voltage upon receiving the first voltage and the second voltage higher than the first voltage. A buffer portion operates on the intermediate voltage upon receiving a first signal and an inverted first signal of a first amplitude corresponding to the first voltage. The buffer portion outputs a second signal and an inverted second signal having a second amplitude corresponding to the intermediate voltage. A level shift portion operates on the second voltage upon receiving the second signal and the inverted second signal, and outputs a third signal and an inverted third signal having a third amplitude corresponding to the second voltage.Type: GrantFiled: June 11, 2010Date of Patent: August 16, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Kyoichi Takenaka
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Publication number: 20110006809Abstract: According to one embodiment, a level conversion circuit includes an intermediate voltage generating portion to generate an intermediate voltage between a first voltage and a second voltage upon receiving the first voltage and the second voltage higher than the first voltage. A buffer portion operates on the intermediate voltage upon receiving a first signal and an inverted first signal of a first amplitude corresponding to the first voltage. The buffer portion outputs a second signal and an inverted second signal having a second amplitude corresponding to the intermediate voltage. A level shift portion operates on the second voltage upon receiving the second signal and the inverted second signal, and outputs a third signal and an inverted third signal having a third amplitude corresponding to the second voltage.Type: ApplicationFiled: June 11, 2010Publication date: January 13, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Kyoichi TAKENAKA
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Patent number: 7671655Abstract: A level conversion circuit includes a high-potential-side level conversion unit which is connected between a first high-voltage power supply and a first low-voltage power supply, and converts a high-potential-side voltage of an input signal, a low-potential-side level conversion unit which is connected between a second high-voltage power supply with a lower voltage than the first high-voltage power supply and a second low-voltage power supply with a lower voltage than the first low-voltage power supply, and converts a low-potential-side voltage of the input signal, and an output unit to which an output of the high-potential-side level conversion unit and an output of the low-potential-side level conversion unit are input, and which outputs a voltage level of the first high-voltage power supply and a voltage level of the second low-voltage power supply.Type: GrantFiled: November 8, 2007Date of Patent: March 2, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Kyoichi Takenaka, Takashi Ito
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Publication number: 20080169847Abstract: A driver includes an output circuit which converts an input signal to a predetermined output waveform and outputs the predetermined waveform to first and second output terminals, a first output resistor having one end connected to the first output terminal, a second output resistor having one end connected to the second output terminal, an output resistor switch element having one end connected to the other end of the first output resistor, and having the other end connected to the other end of the second output resistor, and a 2-input-2-output amplifier which receives first and second input voltages corresponding to voltages at both ends of the output resistor switch element, and outputs voltages, which are produced by amplifying voltage differences between a reference voltage and the first and second input voltages, a high impedance state being set between both ends of the output resistor switch element.Type: ApplicationFiled: January 10, 2008Publication date: July 17, 2008Inventor: Kyoichi TAKENAKA
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Publication number: 20080111610Abstract: A level conversion circuit includes a high-potential-side level conversion unit which is connected between a first high-voltage power supply and a first low-voltage power supply, and converts a high-potential-side voltage of an input signal, a low-potential-side level conversion unit which is connected between a second high-voltage power supply with a lower voltage than the first high-voltage power supply and a second low-voltage power supply with a lower voltage than the first low-voltage power supply, and converts a low-potential-side voltage of the input signal, and an output unit to which an output of the high-potential-side level conversion unit and an output of the low-potential-side level conversion unit are input, and which outputs a voltage level of the first high-voltage power supply and a voltage level of the second low-voltage power supply.Type: ApplicationFiled: November 8, 2007Publication date: May 15, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kyoichi Takenaka, Takashi Ito
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Patent number: 7075369Abstract: Variable gain amplifier and a LSI including the variable gain amplifier that expands an output voltage range or control voltage range without increasing power consumption. The variable gain amplifier includes a voltage-current conversion circuit; a variable gain unit; and a voltage output unit. The voltage-current conversion circuit outputs a first positive current and a first negative current in proportion to an input voltage. The variable gain unit inputting the first positive current and the first negative current controlled by a control signal and outputs four output currents including a second positive current, a third positive current, a second negative current and a third negative current. The voltage output unit inputs either the second positive current and the second negative current or the third positive current and the third negative current Iop3, and outputs a positive output voltage and a negative output voltage.Type: GrantFiled: June 28, 2004Date of Patent: July 11, 2006Assignee: Kabushiki Kaisha TohibaInventor: Kyoichi Takenaka
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Patent number: 6853256Abstract: A first current controlled oscillator outputs an oscillation signal of a first frequency equal to a product of a first control current and a first gain. A first voltage/current converting circuit outputs a first output current equal to a product of a second gain and a voltage difference between a first control voltage and a first reference voltage. A first reference current generator outputs a constant current. A control current circuit outputs a second output current variable. An adder sets the first control current to a sum of the first output current, the constant current and the second output current.Type: GrantFiled: January 13, 2003Date of Patent: February 8, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Kyoichi Takenaka, Akihiko Yoshizawa
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Publication number: 20050017784Abstract: Variable gain amplifier and a LSI including the variable gain amplifier that expands an output voltage range or control voltage range without increasing power consumption. The variable gain amplifier includes a voltage-current conversion circuit; a variable gain unit; and a voltage output unit. The voltage-current conversion circuit outputs a first positive current and a first negative current in proportion to an input voltage. The variable gain unit inputting the first positive current and the first negative current controlled by a control signal and outputs four output currents including a second positive current, a third positive current, a second negative current and a third negative current. The voltage output unit inputs either the second positive current and the second negative current or the third positive current and the third negative current Iop3, and outputs a positive output voltage and a negative output voltage.Type: ApplicationFiled: June 28, 2004Publication date: January 27, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Kyoichi Takenaka
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Patent number: 6784719Abstract: A level shift circuit encompasses a first transmission circuit configured to transmit a leading edge of an input signal, a second transmission circuit configured to transmit a trailing edge of the input signal, and a composite circuit configured to generate an output signal by synthesizing the leading edge and the trailing edge.Type: GrantFiled: December 18, 2002Date of Patent: August 31, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Ryuta Okamoto, Kyoichi Takenaka, Akihiko Yoshizawa
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Patent number: 6611177Abstract: A voltage controlled oscillator includes an oscillation controller, first and second current sources, oscillation section, and first and second fluctuation transmitters. The oscillation controller generates first and second control potentials. The first and second current sources generate control currents corresponding to the first and second control potentials, respectively. The oscillation section is connected to a power source potential node via the first current source and connected to a ground potential node via the second current source, and generates a clock. The first fluctuation transmitter is disposed between the power source potential node and the first control potential node, and transmits a potential fluctuation in the power source potential node to the first control potential node.Type: GrantFiled: December 6, 2001Date of Patent: August 26, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Kyoichi Takenaka, Akihiko Yoshizawa
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Publication number: 20030137336Abstract: A level shift circuit encompasses a first transmission circuit configured to transmit a leading edge of an input signal, a second transmission circuit configured to transmit a trailing edge of the input signal, and a composite circuit configured to generate an output signal by synthesizing the leading edge and the trailing edge.Type: ApplicationFiled: December 18, 2002Publication date: July 24, 2003Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryuta Okamoto, Kyoichi Takenaka, Akihiko Yoshizawa
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Publication number: 20030132806Abstract: A first current controlled oscillator outputs an oscillation signal of a first frequency equal to a product of a first control current and a first gain. A first voltage/current converting circuit outputs a first output current equal to a product of a second gain and a voltage difference between a first control voltage and a first reference voltage. A first reference current generator outputs a constant current. A control current circuit outputs a second output current variable. An adder sets the first control current to a sum of the first output current, the constant current and the second output current.Type: ApplicationFiled: January 13, 2003Publication date: July 17, 2003Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kyoichi Takenaka, Akihiko Yoshizawa
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Publication number: 20020067215Abstract: A voltage controlled oscillator includes an oscillation controller, first and second current sources, oscillation section, and first and second fluctuation transmitters. The oscillation controller generates first and second control potentials. The first and second current sources generate control currents corresponding to the first and second control potentials, respectively. The oscillation section is connected to a power source potential node via the first current source and connected to a ground potential node via the second current source, and generates a clock. The first fluctuation transmitter is disposed between the power source potential node and the first control potential node, and transmits a potential fluctuation in the power source potential node to the first control potential node.Type: ApplicationFiled: December 6, 2001Publication date: June 6, 2002Inventors: Kyoichi Takenaka, Akihiko Yoshizawa