Abstract: Provided a method for correctly assessing an inflammatory condition of a patient who is receiving a therapy with an IL-6 inhibitor. The method for assessing an inflammatory condition of a patient who is receiving an IL-6 inhibitor, including determining a PTX3 level of a sample derived from a patient who is receiving an IL-6 inhibitor.

Abstract: The present invention has an object of providing a method for producing a carbon fiber woven fabric in which the length of each warp yarn made of a carbon fiber strand is uniform, weft yarns are straightly arranged without waviness, and that is excellent in quality can be obtained with high productivity (production speed), and is characterized that a method for producing a carbon fiber woven fabric using an air jet loom in which heald in a shedding motion has an angle of repose in a range of 0 to 50° when weaving a uni-directional carbon fiber woven fabric woven with a carbon fiber strand having a fineness of 400 to 6,000 tex as the warp yarn and an auxiliary fiber having a fineness of ? or less of the carbon fiber strand as the weft yarn.

Abstract: A floating gate type semiconductor memory and method of manufacture are described including an erasing gate electrode in which a tunneling region can be formed easily and high reliability can be kept. An active region isolated by element isolation insulating films is formed on a semiconductor substrate. A gate insulating film and a floating gate electrode are sequentially formed on the active region. A control gate electrode is formed above the floating gate electrode with a silicon oxide film disposed therebetween. A tunneling insulating film is formed only on the side wall of the floating gate electrode. Then, an erasing gate electrode is formed so as to cover the tunneling insulating film.

Abstract: A highly reliable semiconductor IC circuit can be produced by this etching method: A resist layer is formed on a polysilicon layer which is formed on a silicon dioxide layer on a silicon substrate. The resist layer is used as a mask, and silicon oxide layer deposits thereon while polysilicon layer is being etched. Carbon emission out of the resist layer is thus restrained, and thereby a selectivity, an etching speed ratio of polysilicon layer vs. silicon dioxide layer, is substantially raised.

Abstract: A floating gate type semiconductor memory and method of manufacture are described including an erasing gate electrode in which a tunneling region can be formed easily and high reliability can be kept. An active region isolated by element isolation insulating films is formed on a semiconductor substrate. A gate insulating film and a floating gate electrode are sequentially formed on the active region. A control gate electrode is formed above the floating gate electrode with a silicon oxide film disposed therebetween. A tunneling insulating firm is formed only on the side wall of the floating gate electrode. Then, an erasing gate electrode is formed so as to cover the tunneling insulating film.

Abstract: The invention provides a process to form on a certain conductive type semiconductor substrate 1 insulation layer 9 having openings 11, which regions will become source and drain; a process to form diffusion layer 8 of the same conductive type as semiconductor substrate 1 in to-be-drain space, with insulation layer 9 and photoresist 10 as masks; a process to form side wall layer 13 alongside openings of insulation layer 9; a process to form diffusion layers 4 and 5, conductive type of which layers is opposite to that of semiconductor substrate 1, in to-be-source and to-be-drain regions, with insulation layer 9 and side wall layer 13 as masks; a process to remove insulation layer 9 and side wall layer 13; and a process to form insulation layer 2 on semiconductor substrate in channel region distinguished by, and including part of, diffusion layers 4 and 5, and to form floating-gate electrode 3 on insulation layer 2, and control-gate electrode 7 with insulation layer 6 in between.