Patents by Inventor Kyoko Miyata

Kyoko Miyata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8912092
    Abstract: A method of forming a semiconductor device may include, but is not limited to, the following processes. A multi-layered structure is prepared over a semiconductor substrate. The multi-layered structure may include, but is not limited to, first and second patterns of a first insulating film, a second insulating film covering the first pattern of the first insulating film, and a first conductive film covering the second pattern of the first insulating film. The second insulating film and the first conductive film are polished under conditions that the first and second insulating films are greater in polishing rate than the first conductive film, to expose the first and second patterns of the first insulating film.
    Type: Grant
    Filed: October 19, 2011
    Date of Patent: December 16, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Kyoko Miyata
  • Patent number: 8603892
    Abstract: A semiconductor device includes groove-like regions that are formed between two adjacent bit lines among a plurality of bit lines each having upper and side surfaces covered with a cap insulating film and a side-wall insulating film, respectively, a SiON film that contains more O (oxygen) than N (nitrogen) and continuously covers inner surfaces of the groove-like regions, and a silicon dioxide film formed by reforming polysilazane and filled in the groove-like regions with the SiON film interposed therebetween.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: December 10, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Yoh Matsuda, Kyoko Miyata
  • Publication number: 20130034957
    Abstract: A method of forming a semiconductor device may include, but is not limited to, the following processes. A multi-layered structure is prepared over a semiconductor substrate. The multi-layered structure may include, but is not limited to, first and second patterns of a first insulating film, a second insulating film covering the first pattern of the first insulating film, and a first conductive film covering the second pattern of the first insulating film. The second insulating film and the first conductive film are polished under conditions that the first and second insulating films are greater in polishing rate than the first conductive film, to expose the first and second patterns of the first insulating film.
    Type: Application
    Filed: October 19, 2011
    Publication date: February 7, 2013
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Kyoko MIYATA
  • Publication number: 20120164816
    Abstract: A semiconductor device includes groove-like regions that are formed between two adjacent bit lines among a plurality of bit lines each having upper and side surfaces covered with a cap insulating film and a side-wall insulating film, respectively, a SiON film that contains more O (oxygen) than N (nitrogen) and continuously covers inner surfaces of the groove-like regions, and a silicon dioxide film formed by reforming polysilazane and filled in the groove-like regions with the SiON film interposed therebetween.
    Type: Application
    Filed: March 7, 2012
    Publication date: June 28, 2012
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Yoh MATSUDA, Kyoko MIYATA
  • Patent number: 8154102
    Abstract: A semiconductor device includes groove-like regions that are formed between two adjacent bit lines among a plurality of bit lines each having upper and side surfaces covered with a cap insulating film and a side-wall insulating film, respectively, a SiON film that contains more O (oxygen) than N (nitrogen) and continuously covers inner surfaces of the groove-like regions, and a silicon dioxide film formed by reforming polysilazane and filled in the groove-like regions with the SiON film interposed therebetween.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: April 10, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Yoh Matsuda, Kyoko Miyata
  • Patent number: 8053286
    Abstract: A method of forming a semiconductor device is provided, which may include, but is not limited to, the following processes. Grooves may be formed in an insulating region and in a semiconductor region, while forming burrs near the boundary between the insulating region and the semiconductor region. Protection films may be selectively formed on inside walls of the grooves except on bottom walls of the grooves. A selective thermal process may be carried out in the presence of the protection films, thereby removing the burrs.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: November 8, 2011
    Assignee: Elpida Memory, Inc.
    Inventors: Kyoko Miyata, Fumiki Aiso
  • Publication number: 20100148301
    Abstract: A semiconductor device includes groove-like regions that are formed between two adjacent bit lines among a plurality of bit lines each having upper and side surfaces covered with a cap insulating film and a side-wall insulating film, respectively, a SiON film that contains more O (oxygen) than N (nitrogen) and continuously covers inner surfaces of the groove-like regions, and a silicon dioxide film formed by reforming polysilazane and filled in the groove-like regions with the SiON film interposed therebetween.
    Type: Application
    Filed: December 16, 2009
    Publication date: June 17, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Yoh MATSUDA, Kyoko MIYATA
  • Publication number: 20090130823
    Abstract: A method of forming a semiconductor device is provided, which may include, but is not limited to, the following processes. Grooves may be formed in an insulating region and in a semiconductor region, while forming burrs near the boundary between the insulating region and the semiconductor region. Protection films may be selectively formed on inside walls of the grooves except on bottom walls of the grooves. A selective thermal process may be carried out in the presence of the protection films, thereby removing the burrs.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 21, 2009
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Kyoko MIYATA, Fumiki AISO