Abstract: A semiconductor device includes: a semiconductor substrate including a first area and a second area; a plurality of memory cells provided in the first area; a mark provided in the second area and having a first side surface and a second side surface that intersects with the first side surface; and a plurality of patterns provided in the second area and provided on the first side surface and the second side surface.

Abstract: A semiconductor memory device includes a first interconnect, a second interconnect, a first storage layer, and a first insulating film. The first insulating film is provided along a surface of a part of the second interconnect and a surface of the first storage layer. The first insulating film is composed of Si, N, and O. The atomic ratio (N/O) between N and O in the first insulating film is not less than 1.0 at a first position which is the position of the second interconnect-side end surface of the first storage layer in a third direction. The atomic ratio (N/O) between N and O in the first insulating film is less than 1.0 at a second position which is the position of the end surface of the second interconnect, opposite to the first storage layer-side end surface, in the third direction.

Abstract: A semiconductor memory device includes a first interconnect, a second interconnect, a first storage layer, and a first insulating film. The first insulating film is provided along a surface of a part of the second interconnect and a surface of the first storage layer. The first insulating film is composed of Si, N, and O. The atomic ratio (N/O) between N and O in the first insulating film is not less than 1.0 at a first position which is the position of the second interconnect-side end surface of the first storage layer in a third direction. The atomic ratio (N/O) between N and O in the first insulating film is less than 1.0 at a second position which is the position of the end surface of the second interconnect, opposite to the first storage layer-side end surface, in the third direction.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a columnar section and an interconnection section. The stacked body includes a first insulating layer, a first electrode layer, a second insulating layer, and a second electrode layer. The first insulating layer includes a first surface facing the substrate, and a second surface facing the first electrode layer and opposite to the first surface. The second insulating layer includes a third surface facing the first electrode layer, and a fourth surface facing the second electrode layer and opposite to the third surface. A width of the interconnection section located between the first surface and the second surface in a second direction perpendicular to a stacking direction and a first direction is larger than a width of the interconnection section located between the third surface and the fourth surface in the second direction.

Abstract: A semiconductor memory device according to an embodiment comprises: a memory cell array, the memory cell array including: an inter-layer insulating layer and a conductive layer stacked in a stacking direction; a columnar semiconductor layer having a side surface that faces side surfaces of the inter-layer insulating layer and the conductive layer and extending in the stacking direction; and a block insulating layer and a block high-permittivity layer disposed between the columnar semiconductor layer and the conductive layer, the block insulating layer including: a first block insulating film that covers a side surface of the columnar semiconductor layer from a lower surface of the inter-layer insulating layer to an upper surface of the conductive layer in the stacking direction; and a second block insulating film that contacts the first block insulating film and covers at least a side surface and a lower surface of the conductive layer.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a columnar section and an interconnection section. The stacked body includes a first insulating layer, a first electrode layer, a second insulating layer, and a second electrode layer. The first insulating layer includes a first surface facing the substrate, and a second surface facing the first electrode layer and opposite to the first surface. The second insulating layer includes a third surface facing the first electrode layer, and a fourth surface facing the second electrode layer and opposite to the third surface. A width of the interconnection section located between the first surface and the second surface in a second direction perpendicular to a stacking direction and a first direction is larger than a width of the interconnection section located between the third surface and the fourth surface in the second direction.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.

Abstract: A semiconductor memory device according to an embodiment comprises: a memory cell array, the memory cell array including: an inter-layer insulating layer and a conductive layer stacked in a stacking direction; a columnar semiconductor layer having a side surface that faces side surfaces of the inter-layer insulating layer and the conductive layer and extending in the stacking direction; and a block insulating layer and a block high-permittivity layer disposed between the columnar semiconductor layer and the conductive layer, the block insulating layer including: a first block insulating film that covers a side surface of the columnar semiconductor layer from a lower surface of the inter-layer insulating layer to an upper surface of the conductive layer in the stacking direction; and a second block insulating film that contacts the first block insulating film and covers at least a side surface and a lower surface of the conductive layer.