Abstract: A method performed by a computing device for clustering an image according to an embodiment of the present disclosure includes performing a first clustering on feature vectors of the plurality of images, and performing a second clustering for feature vectors belonging to some clusters that do not satisfy a reference score among clusters formed as a result of the first clustering, wherein a clustering parameter of the second clustering and a clustering parameter of the first clustering are different from each other.

Abstract: A method for clustering based on unsupervised learning according to an embodiment of the invention enables clustering for newly generated patterns and is robust against noise, and does not require tagging for training data. According to one or more embodiments, noise is accurately removed using three-dimensional stacked spatial auto-correlation, and multivariate spatial probability distribution values and polar coordinate system spatial probability distribution values are used as learning features for clustering model generation, making them robust to noise, rotation, and fine unusual shapes. In addition, clusters resulting from clustering are classified into multi-level clusters, and stochastic automatic evaluation of normal/defect clusters is possible only with measurement data without a label.

Abstract: A method for clustering based on unsupervised learning according to an embodiment of the invention enables clustering for newly generated patterns and is robust against noise, and does not require tagging for training data. According to one or more embodiments, noise is accurately removed using three-dimensional stacked spatial auto-correlation, and multivariate spatial probability distribution values and polar coordinate system spatial probability distribution values are used as learning features for clustering model generation, making them robust to noise, rotation, and fine unusual shapes. In addition, clusters resulting from clustering are classified into multi-level clusters, and stochastic automatic evaluation of normal/defect clusters is possible only with measurement data without a label.

Abstract: A method for clustering based on unsupervised learning according to an embodiment of the invention enables clustering for newly generated patterns and is robust against noise, and does not require tagging for training data. According to one or more embodiments of the invention, noise is accurately removed using three-dimensional stacked spatial auto-correlation, and multivariate spatial probability distribution values and polar coordinate system spatial probability distribution values are used as learning features for clustering model generation, making them robust to noise, rotation, and fine unusual shapes. In addition, clusters resulting from clustering are classified into multi-level clusters, and stochastic automatic evaluation of normal/defect clusters is possible only with measurement data without a label.

Abstract: A method performed by a computing device for clustering an image according to an embodiment of the present disclosure includes performing a first clustering on feature vectors of the plurality of images, and performing a second clustering for feature vectors belonging to some clusters that do not satisfy a reference score among clusters formed as a result of the first clustering, wherein a clustering parameter of the second clustering and a clustering parameter of the first clustering are different from each other.

Abstract: A method for clustering based on unsupervised learning according to an embodiment of the invention enables clustering for newly generated patterns and is robust against noise, and does not require tagging for training data. According to one or more embodiments of the invention, noise is accurately removed using three-dimensional stacked spatial auto-correlation, and multivariate spatial probability distribution values and polar coordinate system spatial probability distribution values are used as learning features for clustering model generation, making them robust to noise, rotation, and fine unusual shapes. In addition, clusters resulting from clustering are classified into multi-level clusters, and stochastic automatic evaluation of normal/defect clusters is possible only with measurement data without a label.

Abstract: The device includes: a tunnel insulating layer, a charge trap layer; a blocking insulating layer; and a gate electrode sequentially formed on a substrate. The charge trap layer includes: plural trap layers comprising a first material having a first band gap energy level; spaced apart nanodots, each nanodot being at least partially surrounded by at least one of the trap layers, wherein the nanodots comprise a second material having a second band gap energy level that is lower than the first band gap energy level; and an intermediate blocking layer comprising a third material having a third band gap energy level that is higher than the first band gap energy level, formed between at least two of the trap layers. This structure prevents loss of charges from the charge trap layer and improves charge storage capacity.

Abstract: A memory device includes an insulating layer formed over a substrate, a gate formed over the insulating layer, and charge storage elements disposed over the insulating layer. The charge storage elements are separated from each other and are electrically insulated, and each of the charge storage elements is capable of storing at least one charge. The charge storage elements can include fullerenes.

Abstract: The disclosure herein relates to a lithium ion conducting electrolyte. This electrolytic material has improved ionic conductivity. The material disclosed herein is an amorphous compound of the formula LixSMwOyNz wherein x is between approximately 0.5 and 3, y is between 1 and 6, z is between 0.1 and 1, w is less than 0.3 and M is an element selected from B, Ge, Si, P, As, Cl, Br, I, and combinations thereof. The material can be prepared in the form of a thin film. The electrolyte material can be used in microbatteries and electronic systems.

Abstract: The disclosure herein relates to a lithium ion conducting electrolyte. This electrolytic material has improved ionic conductivity. The material disclosed herein is an amorphous compound of the formula LixSMwOyNz wherein x is between approximately 0.5 and 3, y is between 1 and 6, z is between 0.1 and 1, w is less than 0.3 and M is an element selected from B, Ge, Si, P, As, Cl, Br, I, and combinations thereof. The material can be prepared in the form of a thin film. The electrolyte material can be used in microbatteries and elctronic systems.

Abstract: Non-volatile memory devices can be fabricated by forming a tunnel dielectric layer on a semiconductor substrate, subjecting the semiconductor substrate having the tunnel dielectric layer to an atomic layer deposition (ALD) process to form nanocrystals on the tunnel dielectric layer, removing the semiconductor substrate having the nanocrystals from an atomic layer deposition chamber, forming a control gate dielectric layer on the semiconductor substrate having the nanocrystal, and forming a control gate electrode on the semiconductor substrate having the control gate dielectric layer.

Abstract: In a method of forming a thin layer having a desired composition, a source gas is provided onto a substrate loaded in a chamber for a first time, and the source gas is chemisorbed onto the substrate. While the source gas is provided, a plasma is generated in the chamber for a second time to change the chemisorbed source gas into the thin layer having the desired composition. The thin layer may have a stoichiometrical composition or a non-stoichiometrical composition.

Abstract: A charge trap flash memory device and method of making same are provided. The device includes: a tunnel insulating layer, a charge trap layer; a blocking insulating layer; and a gate electrode sequentially formed on a substrate. The charge trap layer includes: plural trap layers comprising a first material having a first band gap energy level; spaced apart nanodots, each nanodot being at least partially surrounded by at least one of the trap layers, wherein the nanodots comprise a second material having a second band gap energy level that is lower than the first band gap energy level; and an intermediate blocking layer comprising a third material having a third band gap energy level that is higher than the first band gap energy level, formed between at least two of the trap layers. This structure prevents loss of charges from the charge trap layer and improves charge storage capacity.

Abstract: Provided are a semiconductor device and a method of driving the semiconductor device. The semiconductor device includes an optical reaction transistor. The optical reaction transistor includes a semiconductor substrate, a tunnel insulation layer formed on the semiconductor substrate, an optical reaction layer formed on the tunnel insulation layer, a blocking insulation layer formed on the optical reaction layer, and a gate electrode formed on the blocking insulation layer.

Abstract: In a method of forming a silicon-rich nanocrystalline structure by an ALD process, a first gas including a first silicon compound is provided onto an object to form a silicon-rich chemisorption layer on the object. A second gas including oxygen is provided onto the silicon-rich chemisorption layer to form a silicon-rich insulation layer on the object. A third gas including a second silicon compound is provided onto the silicon-rich insulation layer to form a silicon nanocrystalline layer on the silicon-rich insulation layer. The first gas, the second gas and the third gas may be repeatedly provided to alternately form the silicon-rich nanocrystalline structure having a plurality of silicon-rich insulation layers and a plurality of silicon nanocrystalline layers on the object.

Abstract: A flash memory device including a hybrid structure charge trap layer and a related method of manufacture are disclosed. The charge trap layer includes at least one hybrid trap layer including a first trap layer formed from a first material having a first band gap energy, and a plurality of nano dots separated from each other such that each nano dot is at least partially encircled by the first trap layer, the plurality of nano dots being formed from a second material having a second band gap energy lower than the first band gap energy.

Abstract: A memory device includes an insulating layer formed over a substrate, a gate formed over the insulating layer, and charge storage elements disposed over the insulating layer. The charge storage elements are separated from each other and are electrically insulated, and each of the charge storage elements is capable of storing at least one charge. The charge storage elements can include fullerenes.

Abstract: An embodiment of a pseudo nonvolatile memory device incorporating a high capacity micro battery includes a DRAM chip having bonding pads. The DRAM chip may be attached to a frame. The frame may have external connecting terminals corresponding to the bonding pads. Wires are provided for electrically connecting the bonding pads to corresponding external connecting terminals. The bonding pads and the wires may be covered with an encapsulant. A micro battery is provided over the DRAM chip. The micro battery may supply power to the DRAM chip.

Abstract: The disclosure herein relates to a lithium ion conducting electrolyte. This electrolytic material has improved ionic conductivity. The material disclosed herein is an amorphous compound of the formula LixSMwOyNz wherein x is between approximately 0.5 and 3, y is between 1 and 6, z is between 0.1 and 1, w is less than 0.3 and M is an element selected from B, Ge, Si, P, As, Cl, Br, I, and combinations thereof. The material can be prepared in the form of a thin film. The electrolyte material can be used in microbatteries and elctronic systems.

Abstract: Non-volatile memory devices can be fabricated by forming a tunnel dielectric layer on a semiconductor substrate, subjecting the semiconductor substrate having the tunnel dielectric layer to an atomic layer deposition (ALD) process to form nanocrystals on the tunnel dielectric layer, removing the semiconductor substrate having the nanocrystals from an atomic layer deposition chamber, forming a control gate dielectric layer on the semiconductor substrate having the nanocrystal, and forming a control gate electrode on the semiconductor substrate having the control gate dielectric layer.