Abstract: A display device includes: a substrate including a pixel area and a non-pixel area surrounding the pixel area, first, second and third light emitting elements on the substrate, and a pixel defining layer on the substrate. The pixel area includes first, second and third sub-pixel areas. The first light emitting element includes a first pixel electrode disposed in the first sub-pixel area. The second light emitting element includes a second pixel electrode disposed in the second sub-pixel area. The third light emitting element includes a third pixel electrode disposed in the third sub-pixel area. A peripheral opening overlapping the non-pixel area is defined in the pixel defining layer to continuously extend along between the first, second, and third sub-pixel areas. The pixel defining layer covers edges of each of the first, second, and third pixel electrodes on the substrate and continuously extends along at least two adjacent sub-pixel areas.

Abstract: According to an exemplary embodiment of the present invention, a display device includes a static electricity blocking circuit having a first conductive layer, a first semiconductor portion, a second semiconductor portion, a channel portion disposed therebetween, a first electrode connected to the first semiconductor portion through first signal line contact holes, and a second electrode connected to the second semiconductor portion through first power line contact holes. The first signal line contact holes are disposed closer to an outermost edge of the first semiconductor portion than an innermost edge thereof. The first power line contact holes are disposed closer to an outermost edge of the second semiconductor portion than an innermost edge thereof. The second conductive layer is closer to the innermost edge of the first semiconductor portion than the outermost edge thereof and is closer to the innermost edge of the second semiconductor portion than the outermost edge thereof.

Abstract: According to an exemplary embodiment of the present invention, a display device includes a static electricity blocking circuit having a first conductive layer, a first semiconductor portion, a second semiconductor portion, a channel portion disposed therebetween, a first electrode connected to the first semiconductor portion through first signal line contact holes, and a second electrode connected to the second semiconductor portion through first power line contact holes. The first signal line contact holes are disposed closer to an outermost edge of the first semiconductor portion than an innermost edge thereof. The first power line contact holes are disposed closer to an outermost edge of the second semiconductor portion than an innermost edge thereof. The second conductive layer is closer to the innermost edge of the first semiconductor portion than the outermost edge thereof and is closer to the innermost edge of the second semiconductor portion than the outermost edge thereof.

Abstract: A conductive pattern includes an organic insulating layer, a first conductive layer provided on the insulating layer and including at least a first sub-conductive layer, and an additional conductive layer provided between the insulating layer and the first conductive layer, or on the first conductive layer, wherein the additional conductive layer includes a metal nitride.

Abstract: A conductive pattern includes an organic insulating layer, a first conductive layer provided on the insulating layer and including at least a first sub-conductive layer, and an additional conductive layer provided between the insulating layer and the first conductive layer, or on the first conductive layer, wherein the additional conductive layer includes a metal nitride.

Abstract: A display device includes: a substrate; a static electricity shielding member formed on the substrate; a scan line formed on the substrate and transferring a scan signal; a data line and a driving voltage line intersecting the scan line, being insulated therefrom and each transferring a data signal and a driving voltage; a thin film transistor formed on the static electricity shielding member; a first sacrifice electrode connected to the static electricity shielding member; and a second sacrifice electrode positioned under the first sacrifice electrode to form a sacrifice capacitor.

Abstract: A display device includes: a substrate; a static electricity shielding member formed on the substrate; a scan line formed on the substrate and transferring a scan signal; a data line and a driving voltage line intersecting the scan line, being insulated therefrom and each transferring a data signal and a driving voltage; a thin film transistor formed on the static electricity shielding member; a first sacrifice electrode connected to the static electricity shielding member; and a second sacrifice electrode positioned under the first sacrifice electrode to form a sacrifice capacitor.

Abstract: A scan driving device includes: a first node transmitted with a clock signal input to a first clock signal input terminal; a second node transmitted with an input signal according to a clock signal input to a second clock signal input terminal; a first transistor transmitting a power source voltage to an output terminal according to a voltage of the first node; a second transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node; and a dummy transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node. One of the second transistor and the dummy transistor is cut off.

Abstract: A scan driving device includes: a first node transmitted with a clock signal input to a first clock signal input terminal; a second node transmitted with an input signal according to a clock signal input to a second clock signal input terminal; a first transistor transmitting a power source voltage to an output terminal according to a voltage of the first node; a second transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node; and a dummy transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node. One of the second transistor and the dummy transistor is cut off.