Patents by Inventor Kyong Sik Yoo

Kyong Sik Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7022599
    Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes depositing an O3-TEOS oxide film having a good flow-like property under a high adhesive force in order to prevent degradation in the characteristic of the surface of a lower insulating film made of a PE-TEOS oxide film and generation of defect due to the topology difference. Therefore, the disclosed method can improve the electrical characteristic of a semiconductor device and the manufacturing yield.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: April 4, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kyong Sik Yoo, Sung Ki Park
  • Publication number: 20030119302
    Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes depositing an O3-TEOS oxide film having a good flow-like property under a high adhesive force in order to prevent degradation in the characteristic of the surface of a lower insulating film made of a PE-TEOS oxide film and generation of defect due to the topology difference. Therefore, the disclosed method can improve the electrical characteristic of a semiconductor device and the manufacturing yield.
    Type: Application
    Filed: November 27, 2002
    Publication date: June 26, 2003
    Inventors: Kyong Sik Yoo, Sung Ki Park
  • Patent number: 6472268
    Abstract: In a method for forming a storage node contact, the inorganic SOG layer is deposited and heat-treated after forming a bit line having a conductive layer and a spacer on the semiconductor substrate and accordingly, there is an advantage that the density of the organic SOG layer embedded between the bit lines become lower than that of the organic SOG layer stacked on the bit lines. As a result, when performing the wet etching process, the speed for etching the inorganic SOG layer between the bit lines become very rapid, so that an artificial void is formed, an etching become very easier when performing a dry etching process of a deep storage node contact junction part. According to the present invention, the characteristic and yield of the semiconductor device become increased. Also, the present invention is very useful and effective because the high integration of the semiconductor device is possible.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: October 29, 2002
    Assignee: Hynix Semiconductor, Inc.
    Inventor: Kyong-sik Yoo