Patents by Inventor KYOSUKE KOBINATA

KYOSUKE KOBINATA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11646328
    Abstract: An imaging device including a semiconductor substrate; a first pixel including a first photoelectric converter configured to convert incident light into charge, and a first diffusion region in the semiconductor substrate, configured to electrically connected to the first photoelectric converter and a second pixel including a second photoelectric converter, configured to convert incident light into charge, and a second diffusion region in the semiconductor substrate, configured to electrically connected to the second photoelectric converter, wherein an area of the first photoelectric converter is greater than an area of the second photoelectric converter in a plan view, both the first diffusion region and the second diffusion region overlap with the first photoelectric converter in the plan view, and neither the first diffusion region nor the second diffusion region overlaps with the second photoelectric converter in the plan view.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 9, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kyosuke Kobinata, Sanshiro Shishido, Yoshihiro Sato
  • Publication number: 20230096486
    Abstract: A method of manufacturing a layered device chip assembly includes forming first grooves in a first wafer, fixing the first wafer to a support body, grinding the first wafer to expose the first grooves, forming a first resin layer in the first grooves, simultaneously polishing the first wafer and the first resin layer to expose the first resin layer, forming second grooves in the second wafer, the second grooves having a width on the face side larger than a width of the first grooves and a width at groove bottoms that is smaller than the width on the face side of the second wafer, affixing the second wafer to the first wafer, grinding the second wafer to expose the second grooves on the reverse side thereof, forming a second resin layer in the second grooves, and dividing the first wafer and the second wafer into a plurality of assemblies.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 30, 2023
    Inventors: Shunsuke TERANISHI, Zhiwen CHEN, Kyosuke KOBINATA, Akihito KAWAI
  • Publication number: 20230020620
    Abstract: A laminated device wafer forming method includes a laminating step of laminating a first device wafer and a second device wafer to each other, the laminating step including a position adjusting step of imaging, by an imaging unit, a first predetermined line formed on a peripheral portion on the front surface side of the first device wafer and located outside rectangular regions corresponding to devices and a second predetermined line formed on a peripheral portion on the front surface side of the second device wafer and located outside the rectangular regions corresponding to the devices, and adjusting relative positions of the first device wafer and the second device wafer by using the first predetermined line and the second predetermined line.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 19, 2023
    Inventors: Zhiwen CHEN, Kyosuke KOBINATA, Shunsuke TERANISHI, Akihito KAWAI
  • Publication number: 20210013252
    Abstract: An imaging device including a semiconductor substrate; a first pixel including a first photoelectric converter configured to convert incident light into charge, and a first diffusion region in the semiconductor substrate, configured to electrically connected to the first photoelectric converter and a second pixel including a second photoelectric converter, configured to convert incident light into charge, and a second diffusion region in the semiconductor substrate, configured to electrically connected to the second photoelectric converter, wherein an area of the first photoelectric converter is greater than an area of the second photoelectric converter in a plan view, both the first diffusion region and the second diffusion region overlap with the first photoelectric converter in the plan view, and neither the first diffusion region nor the second diffusion region overlaps with the second photoelectric converter in the plan view.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 14, 2021
    Inventors: Kyosuke KOBINATA, Sanshiro SHISHIDO, Yoshihiro SATO
  • Patent number: 10825846
    Abstract: An imaging device includes: a semiconductor substrate; a first pixel including: a first photoelectric converter above the semiconductor substrate, including first and second electrodes and a first photoelectric conversion layer between the first and second electrodes, configured to convert incident light into first charge; and a first charge accumulation region in the semiconductor substrate, electrically connected to the second electrode; and a second pixel including a second photoelectric converter above the semiconductor substrate, including third and fourth electrodes and a second photoelectric conversion layer between the third and fourth electrodes, configured to convert incident light into second charge; and a second charge accumulation region in the semiconductor substrate, electrically connected to the fourth electrode.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: November 3, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kyosuke Kobinata, Sanshiro Shishido, Yoshihiro Sato
  • Publication number: 20190035832
    Abstract: An imaging device includes: a semiconductor substrate; a first pixel including: a first photoelectric converter above the semiconductor substrate, including first and second electrodes and a first photoelectric conversion layer between the first and second electrodes, configured to convert incident light into first charge; and a first charge accumulation region in the semiconductor substrate, electrically connected to the second electrode; and a second pixel including a second photoelectric converter above the semiconductor substrate, including third and fourth electrodes and a second photoelectric conversion layer between the third and fourth electrodes, configured to convert incident light into second charge; and a second charge accumulation region in the semiconductor substrate, electrically connected to the fourth electrode.
    Type: Application
    Filed: July 12, 2018
    Publication date: January 31, 2019
    Inventors: KYOSUKE KOBINATA, SANSHIRO SHISHIDO, YOSHIHIRO SATO