Patents by Inventor Kyosuke Miyagi

Kyosuke Miyagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10381901
    Abstract: A wireless in-wheel electric motor assembly having a wheel, an electric motor disposed within the wheel, the electric motor including a stator and a rotor, a receiving coil disposed within the wheel and operable to receive wirelessly transmitted energy, a first converter disposed within the wheel, electrically coupled to the receiving coil and operable to convert the wirelessly transmitted energy from the receiving coil into direct current, an inverter circuit disposed within the wheel, electrically coupled to the conversion circuit and the electric motor, and operable to power the electric motor. The wireless in-wheel electric motor assembly further includes a cooling system disposed within the wheel that includes a micro pump operable to pump coolant, a fluid line operable to pass the coolant proximate at least one of the conversion circuit and the inverter circuit, and a heat exchanger operable to receive heated coolant and dissipate heat to the environment.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: August 13, 2019
    Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.
    Inventors: Feng Zhou, Ercan Mehmet Dede, Hiroshi N. Ukegawa, Kyosuke Miyagi
  • Patent number: 10192814
    Abstract: An electronics assembly includes a cooling chip structure having a device facing surface opposite a base surface and one or more sidewalls extending around a perimeter of the cooling chip structure between the device facing surface and the base surface. A plurality of fluid microchannels fluidly are coupled to a fluid inlet port and a fluid outlet port. A through substrate via extends from the base surface of the cooling chip structure to the device facing surface of the cooling chip structure, where the through substrate via intersects two or more fluid microchannels of the plurality of fluid microchannels.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: January 29, 2019
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Yuji Fukuoka, Ercan Dede, Kyosuke Miyagi
  • Publication number: 20180331601
    Abstract: A wireless in-wheel electric motor assembly having a wheel, an electric motor disposed within the wheel, the electric motor including a stator and a rotor, a receiving coil disposed within the wheel and operable to receive wirelessly transmitted energy, a first converter disposed within the wheel, electrically coupled to the receiving coil and operable to convert the wirelessly transmitted energy from the receiving coil into direct current, an inverter circuit disposed within the wheel, electrically coupled to the conversion circuit and the electric motor, and operable to power the electric motor. The wireless in-wheel electric motor assembly further includes a cooling system disposed within the wheel that includes a micro pump operable to pump coolant, a fluid line operable to pass the coolant proximate at least one of the conversion circuit and the inverter circuit, and a heat exchanger operable to receive heated coolant and dissipate heat to the environment.
    Type: Application
    Filed: May 12, 2017
    Publication date: November 15, 2018
    Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Feng Zhou, Ercan Mehmet Dede, Hiroshi N. Ukegawa, Kyosuke Miyagi
  • Patent number: 10121729
    Abstract: A power electronics assembly having a semiconductor device that includes a first device surface opposite a second device surface, a semiconductor substrate layer that extends from the first device surface to a substrate-drift interface, a semiconductor drift layer that extends from the substrate-drift interface towards the second device surface, and a semiconductor fluid channel is positioned within the semiconductor substrate layer of the semiconductor device. Further, the semiconductor fluid channel includes an inner surface. Moreover, a fluid channel metallization layer is positioned along the inner surface of the semiconductor fluid channel.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: November 6, 2018
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Ercan M. Dede, Kyosuke Miyagi, Yuji Fukuoka
  • Publication number: 20180145009
    Abstract: An electronics assembly includes a cooling chip structure having a device facing surface opposite a base surface and one or more sidewalls extending around a perimeter of the cooling chip structure between the device facing surface and the base surface. A plurality of fluid microchannels fluidly are coupled to a fluid inlet port and a fluid outlet port. A through substrate via extends from the base surface of the cooling chip structure to the device facing surface of the cooling chip structure, where the through substrate via intersects two or more fluid microchannels of the plurality of fluid microchannels.
    Type: Application
    Filed: February 3, 2017
    Publication date: May 24, 2018
    Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Yuji Fukuoka, Ercan Dede, Kyosuke Miyagi
  • Publication number: 20180025962
    Abstract: A power electronics assembly having a semiconductor device that includes a first device surface opposite a second device surface, a semiconductor substrate layer that extends from the first device surface to a substrate-drift interface, a semiconductor drift layer that extends from the substrate-drift interface towards the second device surface, and a semiconductor fluid channel is positioned within the semiconductor substrate layer of the semiconductor device. Further, the semiconductor fluid channel includes an inner surface. Moreover, a fluid channel metallization layer is positioned along the inner surface of the semiconductor fluid channel.
    Type: Application
    Filed: July 25, 2016
    Publication date: January 25, 2018
    Inventors: Ercan M. Dede, Kyosuke Miyagi, Yuji Fukuoka
  • Patent number: 9601592
    Abstract: An IGBT has an emitter region, a top body region that is formed below the emitter region, a floating region that is formed below the top body region, a bottom body region that is formed below the floating region, a trench, a gate insulating film that covers an inner face of the trench, and a gate electrode that is arranged inside the trench. When a distribution of a concentration of p-type impurities in the top body region and the floating region, which are located below the emitter region, is viewed along a thickness direction of a semiconductor substrate, the concentration of the p-type impurities decreases as a downward distance increases from an upper end of the top body region that is located below the emitter region, and assumes a local minimum value at a predetermined depth in the floating region.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: March 21, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masaru Senoo, Kyosuke Miyagi, Tsuyoshi Nishiwaki, Jun Saito
  • Publication number: 20160108204
    Abstract: Transient liquid phase compositions and bonding assemblies are disclosed. In one embodiment, a transient liquid phase composition includes a plurality of particles. Each particle includes a core, an inner shell surrounding the core, the inner shell, and an outer shell surrounding the inner shell. The core is made of a first high melting temperature material, the inner shell is made of a second high melting temperature material, and the outer shell is made of a low melting temperature material. The melting temperature of the low melting temperature material is less than the melting temperature of both the first and second high melting temperature materials.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 21, 2016
    Applicants: Toyota Motor Engineering & Manufacturing North America, Inc., Toyota Jidosha Kabushiki Kaisha
    Inventors: Shailesh N. Joshi, Takehiro Kato, Ercan M. Dede, Kyosuke Miyagi
  • Publication number: 20160035859
    Abstract: An IGBT has an emitter region, a top body region that is formed below the emitter region, a floating region that is formed below the top body region, a bottom body region that is formed below the floating region, a trench, a gate insulating film that covers an inner face of the trench, and a gate electrode that is arranged inside the trench. When a distribution of a concentration of p-type impurities in the top body region and the floating region, which are located below the emitter region, is viewed along a thickness direction of a semiconductor substrate, the concentration of the p-type impurities decreases as a downward distance increases from an upper end of the top body region that is located below the emitter region, and assumes a local minimum value at a predetermined depth in the floating region.
    Type: Application
    Filed: October 15, 2015
    Publication date: February 4, 2016
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masaru SENOO, Kyosuke MIYAGI, Tsuyoshi NISHIWAKI, Jun SAITO
  • Patent number: 9190503
    Abstract: An IGBT has an emitter region, a top body region that is formed below the emitter region, a floating region that is formed below the top body region, a bottom body region that is formed below the floating region, a trench, a gate insulating film that covers an inner face of the trench, and a gate electrode that is arranged inside the trench. When a distribution of a concentration of p-type impurities in the top body region and the floating region, which are located below the emitter region, is viewed along a thickness direction of a semiconductor substrate, the concentration of the p-type impurities decreases as a downward distance increases from an upper end of the top body region that is located below the emitter region, and assumes a local minimum value at a predetermined depth in the floating region.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: November 17, 2015
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masaru Senoo, Kyosuke Miyagi, Tsuyoshi Nishiwaki, Jun Saito
  • Publication number: 20140231866
    Abstract: An IGBT has an emitter region, a top body region that is formed below the emitter region, a floating region that is formed below the top body region, a bottom body region that is formed below the floating region, a trench, a gate insulating film that covers an inner face of the trench, and a gate electrode that is arranged inside the trench. When a distribution of a concentration of p-type impurities in the top body region and the floating region, which are located below the emitter region, is viewed along a thickness direction of a semiconductor substrate, the concentration of the p-type impurities decreases as a downward distance increases from an upper end of the top body region that is located below the emitter region, and assumes a local minimum value at a predetermined depth in the floating region.
    Type: Application
    Filed: September 28, 2011
    Publication date: August 21, 2014
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masaru Senoo, Kyosuke Miyagi, Tsuyoshi Nishiwaki, Jun Saito
  • Patent number: 8076718
    Abstract: The invention has an object to provide an insulation gate type semiconductor device and a method for producing the same in which high breakdown voltage and compactness are achieved. The semiconductor device has a gate trench and a P floating region formed in the cell area and has a terminal trench and a P floating region formed in the terminal area. In addition, a terminal trench of three terminal trenches has a structure similar to that of the gate trench, and the other terminal trenches have a structure in which an insulation substance such as oxide silicon is filled. Also, the P floating region 51 is an area formed by implanting impurities from the bottom surface of the gate trench, and the P floating region is an area formed by implanting impurities from the bottom surface of the terminal trench.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: December 13, 2011
    Assignees: Toyota Jidosha Kabushiki Kaisha, Denso Corporation
    Inventors: Hidefumi Takaya, Kimimori Hamada, Kyosuke Miyagi, Yasushi Okura, Akira Kuroyanagi, Norihito Tokura
  • Patent number: 7999312
    Abstract: A semiconductor 100 has a P? body region and an N? drift region in the order from an upper surface side thereof. A gate trench and a terminal trench passing through the P? body region are formed. The respective trenches are surrounded with P diffusion regions at the bottom thereof. The gate trench builds a gate electrode therein. A P?? diffusion region, which is in contact with the end portion in a lengthwise direction of the gate trench and is lower in concentration than the P? body region and the P diffusion region, is formed. The P?? diffusion region is depleted prior to the P diffusion region when the gate voltage is off. The P?? diffusion region serves as a hole supply path to the P diffusion region when the gate voltage is on.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: August 16, 2011
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hidefumi Takaya, Kimimori Hamada, Kyosuke Miyagi
  • Publication number: 20100224932
    Abstract: A semiconductor 100 has a P? body region and an N? drift region in the order from an upper surface side thereof. A gate trench and a terminal trench passing through the P? body region are formed. The respective trenches are surrounded with P diffusion regions at the bottom thereof. The gate trench builds a gate electrode therein. A P?? diffusion region, which is in contact with the end portion in a lengthwise direction of the gate trench and is lower in concentration than the P? body region and the P diffusion region, is formed. The P?? diffusion region is depleted prior to the P diffusion region when the gate voltage is off. The P?? diffusion region serves as a hole supply path to the P diffusion region when the gate voltage is on.
    Type: Application
    Filed: January 26, 2007
    Publication date: September 9, 2010
    Inventors: Hidefumi Takaya, Kimimori Hamada, Kyosuke Miyagi
  • Publication number: 20080087951
    Abstract: The invention has an object to provide an insulation gate type semiconductor device and a method for producing the same in which high breakdown voltage and compactness are achieved. The semiconductor device has a gate trench and a P floating region formed in the cell area and has a terminal trench and a P floating region formed in the terminal area. In addition, a terminal trench of three terminal trenches has a structure similar to that of the gate trench, and the other terminal trenches have a structure in which an insulation substance such as oxide silicon is filled. Also, the P floating region 51 is an area formed by implanting impurities from the bottom surface of the gate trench, and the P floating region is an area formed by implanting impurities from the bottom surface of the terminal trench.
    Type: Application
    Filed: September 28, 2005
    Publication date: April 17, 2008
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hidefumi Takaya, Kimimori Hamada, Kyosuke Miyagi, Yasushi Okura, Akira Kuroyanagi, Norihiko Tokura