Patents by Inventor Kyosuke NAKAGAWA

Kyosuke NAKAGAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor light emitting element and method for manufacturing the same
    Patent number: 8975098
    Abstract: A method of manufacturing a semiconductor light emitting element includes preparing a semiconductor stacked layer structure by stacking a first semiconductor layer and a second semiconductor layer in this order, forming a second electrode and an insulating layer in this order on the second semiconductor layer, exposing the first semiconductor layer by removing a part of the second semiconductor layer, forming a first electrode by forming a metal layer on the exposed first semiconductor layer and the insulating layer and flattening a surface of the metal layer, forming a first electrode-side bonding layer having a top layer made of Au on the first electrode, preparing a support substrate including a support substrate-side bonding layer having a top surface made of Au, and bonding the first electrode-side bonding layer and the support substrate-side bonding layer.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 10, 2015
    Assignee: Nichia Corporation
    Inventors: Hiroaki Matsumura, Takashi Abe, Kyosuke Nakagawa
  • SEMICONDUCTOR LIGHT EMITTING ELEMENT AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20140024150
    Abstract: A method of manufacturing a semiconductor light emitting element includes preparing a semiconductor stacked layer structure by stacking a first semiconductor layer and a second semiconductor layer in this order, forming a second electrode and an insulating layer in this order on the second semiconductor layer, exposing the first semiconductor layer by removing a part of the second semiconductor layer, forming a first electrode by forming a metal layer on the exposed first semiconductor layer and the insulating layer and flattening a surface of the metal layer, forming a first electrode-side bonding layer having a top layer made of Au on the first electrode, preparing a support substrate including a support substrate-side bonding layer having a top surface made of Au, and bonding the first electrode-side bonding layer and the support substrate-side bonding layer.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 23, 2014
    Inventors: Hiroaki MATSUMURA, Takashi ABE, Kyosuke NAKAGAWA