Patents by Inventor Kyouhei Watanabe

Kyouhei Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200243584
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: April 10, 2020
    Publication date: July 30, 2020
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20200185446
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 10651231
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: May 12, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Patent number: 10608034
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: March 31, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20190182408
    Abstract: An image processing apparatus includes a skin area detection unit configured to detect a skin area of an object person, a difference area detection unit configured to detect a difference area between the visible light image and the infrared light image, a correction target area detection unit configured to detect a correction target area of the object person based on the skin area detected by the skin area detection unit and the difference area detected by the difference area detection unit, and a correction unit configured to correct the correction target area in the visible light image.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 13, 2019
    Inventor: Kyouhei Watanabe
  • Patent number: 10263034
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: April 16, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20190096931
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: November 29, 2018
    Publication date: March 28, 2019
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20190028663
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Application
    Filed: September 20, 2018
    Publication date: January 24, 2019
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 10104320
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: October 16, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20180114808
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: December 21, 2017
    Publication date: April 26, 2018
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 9881958
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: January 30, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 9806124
    Abstract: When forming a hollow portion between each color filter, in order to realize the formation of the hollow portions with a narrower width, a plurality of light receiving portions are formed on the upper surface of a semiconductor substrate, a plurality of color filters corresponding to each of the light receiving portions are formed above the semiconductor substrate, a photoresist is formed on each color filter, side walls are formed on the side surfaces of the photoresist, and a hollow portion is formed between each color filter by performing etching using at least the side walls as a mask.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: October 31, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kyouhei Watanabe
  • Publication number: 20170271387
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: June 2, 2017
    Publication date: September 21, 2017
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20170236862
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Application
    Filed: May 2, 2017
    Publication date: August 17, 2017
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 9704915
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: July 11, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Patent number: 9703015
    Abstract: A photomask for an optical element array includes first and second optical elements. A light transmission rate distribution includes a first area where the first optical element is to be formed, a second area where the second optical element is to be formed, and a third area between the first and second areas, has a first light transmission rate at an end portion of the first area. A second light transmission rate is higher than the first light transmission rate at another end portion. A third light transmission rate at an end portion corresponds to a boundary between the second and third areas. A fourth light transmission rate is higher than the third light transmission rate at another end portion of the second area. The light transmission rate distribution along a first direction is higher than a segment connecting the second and third light transmission rates in the third area.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: July 11, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuhiro Sekine, Mariko Furuta, Jun Iwata, Kyouhei Watanabe
  • Patent number: 9666621
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: May 30, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20160358968
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: August 15, 2016
    Publication date: December 8, 2016
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Publication number: 20160309101
    Abstract: Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
    Type: Application
    Filed: April 13, 2016
    Publication date: October 20, 2016
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Nobuyuki Endo, Kyouhei Watanabe
  • Patent number: 9443895
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: September 13, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa