Patents by Inventor Kyouko Oyama

Kyouko Oyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor circuit and semiconductor device
    Patent number: 8803561
    Abstract: A semiconductor circuit of the present invention comprises a capacitor for charging ON driven electric charges in response to an ON driving signal, a capacitor for charging OFF driven electric charges in response to an OFF driving signal, a signal generating circuit for generating a first trigger signal in response to the ON driving signal, a signal generating circuit for generating a second trigger signal in response to the OFF driving signal, a discharging circuit for discharging the ON driven electric charges in response to the second trigger signal, and a discharging circuit for discharging the OFF driven electric charges in response to the first trigger signal. With this configuration, it is possible to provide a semiconductor circuit and a semiconductor device both of which have a general-purpose malfunction prevention function by which a malfunction due to dV/dt can be prevented without being affected by any external factor.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: August 12, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Motoki Imanishi, Kenji Sakai, Yoshikazu Tanaka, Kyouko Oyama
  • SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR DEVICE
    Publication number: 20120154007
    Abstract: A semiconductor circuit of the present invention comprises a capacitor for charging ON driven electric charges in response to an ON driving signal, a capacitor for charging OFF driven electric charges in response to an OFF driving signal, a signal generating circuit for generating a first trigger signal in response to the ON driving signal, a signal generating circuit for generating a second trigger signal in response to the OFF driving signal, a discharging circuit for discharging the ON driven electric charges in response to the second trigger signal, and a discharging circuit for discharging the OFF driven electric charges in response to the first trigger signal. With this configuration, it is possible to provide a semiconductor circuit and a semiconductor device both of which have a general-purpose malfunction prevention function by which a malfunction due to dV/dt can be prevented without being affected by any external factor.
    Type: Application
    Filed: September 9, 2011
    Publication date: June 21, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Motoki IMANISHI, Kenji Sakai, Yoshikazu Tanaka, Kyouko Oyama