Patents by Inventor Kyounei Yasuda

Kyounei Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8125606
    Abstract: A display device includes a first substrate having a group of terminal electrodes on one side thereof, at least one of the terminal electrodes forming a branched electrode with an isolation region extending along an elongating direction of each the terminal electrode and a second substrate opposing the first substrate such that the terminal electrodes are exposed from an overlapping area of the first substrate and the second substrate.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: February 28, 2012
    Assignee: NLT Technologies, Ltd.
    Inventors: Kyounei Yasuda, Futoshi Nakanishi
  • Patent number: 7564531
    Abstract: An active matrix substrate or TFT substrate is provided with a lower layer wiring with a groove wiring structure covering surroundings of a copper layer with a barrier metal film is formed by forming a groove at an insulating substrate and depositing the barrier metal film and the copper layer in this groove. This groove wiring structure is used for a TFT substrate of a liquid crystal display (LCD) device. It is possible to manufacture an LCD device with large size, high density, a large aperture ratio and in which the disclination defects originating from a different in level of the lower layer wiring and an occurrence of disconnection failures in an upper layer wiring are suppressed.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: July 21, 2009
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Kyounei Yasuda, Seiji Suzuki
  • Publication number: 20090059153
    Abstract: A display device includes a first substrate having a group of terminal electrodes on one side thereof, at least one of the terminal electrodes forming a branched electrode with an isolation region extending along an elongating direction of each the terminal electrode and a second substrate opposing the first substrate such that the terminal electrodes are exposed from an overlapping area of the first substrate and the second substrate.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventors: Kyounei Yasuda, Futoshi Nakanishi
  • Patent number: 7499119
    Abstract: A LCD device prevents corrosion of the transparent conductive layers and contact resistance increase without arising the step coverage degradation due to the thickness increase of the interconnection layer, the step coverage degradation due to the formation of undercut portions, and productivity reduction and fabrication cost increase. A first interconnection line comprising a patterned Al or Al alloy layer is disposed on or over an insulating plate. A first insulating layer is formed to cover the first interconnection line to have a contact hole exposing a part of the first interconnection line. A first conductive material made of a plated metal is in contact with the exposed part of the first interconnection line in the contact hole. A first transparent conductive layer is in contact with the first conductive material. The first transparent conductive layer is electrically connected to the first interconnection line by way of the first conductive material.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: March 3, 2009
    Assignee: NEC LCD Technologies, Ltd.
    Inventor: Kyounei Yasuda
  • Publication number: 20080239680
    Abstract: An method of forming buried wiring lines makes it possible not to limit usable materials for an insulative plate to those having excellent heat resistance and to improve the corrosion resistance of the terminals provided for the buried wiring lines. The surface of an insulative plate is selectively etched using a mask formed on the surface, thereby forming grooves in the surface. A metallic nanoparticle ink is placed over the whole surface of the plate to fill the grooves with the ink, where the mask is being left. The ink is heated for preliminary curing to form a metallic nanoparticle ink film. The part of the film placed on the mask is selectively removed by detaching the mask, thereby leaving the remainder of the film in the grooves. The remaining film in the grooves is heated for main curing, thereby forming desired buried wiring lines.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 2, 2008
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventor: Kyounei YASUDA
  • Publication number: 20080134918
    Abstract: A printing plate for an offset printing is provide. it includes a substrate and a plurality of concave printing plate patterns formed on the substrate. At least one auxiliary pattern is located on a bottom of at least one of the concave printing plate patterns and away from a side face of the concave printing plate pattern. Thereby, even if a plurality of inside void parts occur in a function pattern, an area thereof is small and each inside void part is isolated.
    Type: Application
    Filed: November 12, 2007
    Publication date: June 12, 2008
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventor: Kyounei YASUDA
  • Patent number: 7341898
    Abstract: A thin film transistor circuit device and the production method thereof is demanded for a thin film transistor circuit device, which contains wiring having a structure of an aluminum alloy in a lower layer and a molybdenum alloy in an upper layer, wherein corrosion in air of the molybdenum alloy does not proceed easily. A thin film transistor circuit device which exposes a portion of wiring covered with an insulating film that connects thin film transistors of a main circuit region formed on a center portion of a substrate to a protection circuit region formed on an outer periphery of the substrate, which contains on the exposed surface a terminal which is formed of terminal electrode metal, wherein an uppermost surface of the wiring is a molybdenum alloy comprising niobium.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: March 11, 2008
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Hiroaki Tanaka, Kyounei Yasuda, Seiji Suzuki
  • Publication number: 20070085118
    Abstract: A LCD device prevents corrosion of the transparent conductive layers and contact resistance increase without arising the step coverage degradation due to the thickness increase of the interconnection layer, the step coverage degradation due to the formation of undercut portions, and productivity reduction and fabrication cost increase. A first interconnection line comprising a patterned Al or Al alloy layer is disposed on or over an insulating plate. A first insulating layer is formed to cover the first interconnection line to have a contact hole exposing a part of the first interconnection line. A first conductive material made of a plated metal is in contact with the exposed part of the first interconnection line in the contact hole. A first transparent conductive layer is in contact with the first conductive material. The first transparent conductive layer is electrically connected to the first interconnection line by way of the first conductive material.
    Type: Application
    Filed: October 18, 2006
    Publication date: April 19, 2007
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventor: Kyounei Yasuda
  • Publication number: 20060209222
    Abstract: An active matrix substrate or TFT substrate is provided with a lower layer wiring with a groove wiring structure covering surroundings of a copper layer with a barrier metal film is formed by forming a groove at an insulating substrate and depositing the barrier metal film and the copper layer in this groove. This groove wiring structure is used for a TFT substrate of a liquid crystal display (LCD) device. It is possible to manufacture an LCD device with large size, high density, a large aperture ratio and in which the disclination defects originating from a different in level of the lower layer wiring and an occurrence of disconnection failures in an upper layer wiring are suppressed.
    Type: Application
    Filed: March 15, 2006
    Publication date: September 21, 2006
    Applicant: NEC LCD TECHNOLOGIES, LTD.
    Inventors: Kyounei Yasuda, Seiji Suzuki
  • Patent number: 7105896
    Abstract: A thin film transistor circuit device and the production method thereof is demanded for a thin film transistor circuit device, which contains wiring having a structure of an aluminum alloy in a lower layer and a molybdenum alloy in an upper layer, wherein corrosion in air of the molybdenum alloy does not proceed easily. A thin film transistor circuit device which exposes a portion of wiring covered with an insulating film that connects thin film transistors of a main circuit region formed on a center portion of a substrate to a protection circuit region formed on an outer periphery of the substrate, which contains on the exposed surface a terminal which is formed of terminal electrode metal, wherein an uppermost surface of the wiring is a molybdenum alloy comprising niobium.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: September 12, 2006
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Hiroaki Tanaka, Kyounei Yasuda, Seiji Suzuki
  • Publication number: 20060175611
    Abstract: A thin film transistor circuit device and the production method thereof is demanded for a thin film transistor circuit device, which contains wiring having a structure of an aluminum alloy in a lower layer and a molybdenum alloy in an upper layer, wherein corrosion in air of the molybdenum alloy does not proceed easily. A thin film transistor circuit device which exposes a portion of wiring covered with an insulating film that connects thin film transistors of a main circuit region formed on a center portion of a substrate to a protection circuit region formed on an outer periphery of the substrate, which contains on the exposed surface a terminal which is formed of terminal electrode metal, wherein an uppermost surface of the wiring is a molybdenum alloy comprising niobium.
    Type: Application
    Filed: March 21, 2006
    Publication date: August 10, 2006
    Applicant: NEC LCD Technologies, Ltd.
    Inventors: Hiroaki Tanaka, Kyounei Yasuda, Seiji Suzuki
  • Patent number: 6972821
    Abstract: An active-matrix addressing LCD device that suppresses effectively the off leakage current induced by the charge-up of the spacers placed over the TFTs. The device comprises (a) a first substrate having switching elements; (b) a second substrate coupled with the first substrate in such a way as to form a gap with spacers between the first and second substrates; the spacers being distributed in the gap; (c) a liquid crystal confined in the gap; and (d) protrusions formed in overlapping areas with the switching elements; each of the protrusions being protruded in a direction that narrows the gap. The spacers distributed in the gap are likely to be shifted away from the overlapping areas due to the protrusions.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: December 6, 2005
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Kyounei Yasuda, Satoshi Ihida
  • Publication number: 20050056839
    Abstract: A thin film transistor circuit device and the production method thereof is demanded for a thin film transistor circuit device, which contains wiring having a structure of an aluminum alloy in a lower layer and a molybdenum alloy in an upper layer, wherein corrosion in air of the molybdenum alloy does not proceed easily. A thin film transistor circuit device which exposes a portion of wiring covered with an insulating film that connects thin film transistors of a main circuit region formed on a center portion of a substrate to a protection circuit region formed on an outer periphery of the substrate, which contains on the exposed surface a terminal which is formed of terminal electrode metal, wherein an uppermost surface of the wiring is a molybdenum alloy comprising niobium.
    Type: Application
    Filed: July 21, 2004
    Publication date: March 17, 2005
    Applicant: NEC LCD Technologies, Ltd.
    Inventors: Hiroaki Tanaka, Kyounei Yasuda, Seiji Suzuki
  • Publication number: 20040238888
    Abstract: Lest gate lead lines 122 which are readily corrodable in atmosphere should be exposed on the cutting surface formed at the time of separating an inner display area, which includes gate and drain terminals, in an eventual TFT substrate 100 from static electricity protection lead lines 4 and static electricity protection elements 19, gate terminal electrodes 115 which is formed from corrosion-resistant ITO are cut apart in the vicinity of the gate and drain terminals 3 and 8.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 2, 2004
    Inventors: Kyounei Yasuda, Hiroaki Tanaka
  • Patent number: 6759283
    Abstract: A method of fabricating a thin film transistor, includes the steps of (a) forming a gate electrode on an electrically insulating substrate, (b) forming a gate insulating film on the electrically insulating substrate, covering the gate electrode therewith, (c) forming a semiconductor layer on the gate insulating film above the gate electrode, (d) forming source and drain electrodes both making electrical contact with the semiconductor layer, (e) patterning the semiconductor layer into a channel, (f) applying first plasma to the semiconductor layer through the use of a first gas, and (g) applying second plasma to the semiconductor layer through the use of a second gas, and (h) forming an electrically insulating film covering the semiconductor layer therewith.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: July 6, 2004
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Kyounei Yasuda, Satoshi Ihida, Jukoh Funaki, Manabu Oyama, Yoshikazu Hatazawa
  • Publication number: 20020171084
    Abstract: A method of fabricating a thin film transistor, includes the steps of (a) forming a gate electrode on an electrically insulating substrate, (b) forming a gate insulating film on the electrically insulating substrate, covering the gate electrode therewith, (c) forming a semiconductor layer on the gate insulating film above the gate electrode, (d) forming source and drain electrodes both making electrical contact with the semiconductor layer, (e) patterning the semiconductor layer into a channel, (f) applying first plasma to the semiconductor layer through the use of a first gas, and (g) applying second plasma to the semiconductor layer through the use of a second gas, and (h) forming an electrically insulating film covering the semiconductor layer therewith.
    Type: Application
    Filed: May 15, 2002
    Publication date: November 21, 2002
    Inventors: Kyounei Yasuda, Satoshi Ihida, Jukoh Funaki, Manabu Oyama, Yoshikazu Hatazawa
  • Publication number: 20020167636
    Abstract: An active-matrix addressing LCD device that suppresses effectively the off leakage current induced by the charge-up of the spacers placed over the TFTs. The device comprises (a) a first substrate having switching elements; (b) a second substrate coupled with the first substrate in such a way as to form a gap with spacers between the first and second substrates; the spacers being distributed in the gap; (c) a liquid crystal confined in the gap; and (d) protrusions formed in overlapping areas with the switching elements; each of the protrusions being protruded in a direction that narrows the gap. The spacers distributed in the gap are likely to be shifted away from the overlapping areas due to the protrusions.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 14, 2002
    Applicant: NEC CORPORATION
    Inventors: Kyounei Yasuda, Satoshi Ihida
  • Publication number: 20020159010
    Abstract: A method for manufacturing a reflective-type liquid crystal display which is capable of reducing a number of processes for a thin film transistor used in the reflective-type liquid crystal display. A reflective electrode to be connected to a source electrode of the thin film transistor and a terminal portion connecting electrode to be connected to a terminal portion lower metal film are simultaneously formed on an organic insulating film having convex and concave portions. As a material for the reflective electrode and the terminal portion lower metal film, an Al—Nd (Aluminum—Neodymium) containing 0.9% or more by atom of Nd having excellent corrosion resistance is used.
    Type: Application
    Filed: April 26, 2002
    Publication date: October 31, 2002
    Applicant: NEC CORPORATION
    Inventors: Akitoshi Maeda, Kyounei Yasuda, Hiroaki Tanaka, Syuusaku Kido