Patents by Inventor Kyoungcho Na

Kyoungcho Na has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240310719
    Abstract: An overlay correction method for improving an overlay parameter of an ultra-high order component includes: obtaining misalignment components of an overlay through measurement; converting the misalignment components into overlay parameters; applying a conversion logic between the overlay parameters; converting the overlay parameters into aberration input data; and performing an exposure process by applying the aberration input data to an exposure machine, wherein the overlay parameters are divided into a first overlay parameter shifting in a first direction that is an extending direction of a slit, and a second overlay parameter shifting in a second direction that is perpendicular to the first direction, and the performing of the exposure process includes correcting the first and second overlay parameters including a higher-order component of a 3rd order or greater with respect to a location of the slit in the first direction.
    Type: Application
    Filed: December 7, 2023
    Publication date: September 19, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jonghyun HWANG, Jaeil LEE, Kyoungcho NA
  • Publication number: 20240310720
    Abstract: An overlay correction method capable of accurately measuring and correcting higher-order components of an overlay of a first layer in which a pattern is first formed on a semiconductor substrate, and improving matching with exposure equipment in a subsequent exposure process is disclosed. The overlay correction method includes forming a first overlay mark on a first layer on which a pattern is initially formed on a semiconductor substrate, performing an absolute measurement on the first overlay mark, and correcting an overlay of the first layer based on the absolute measurement. The absolute measurement is a measurement method based on a fixed position of exposure equipment used to form the first overlay mark.
    Type: Application
    Filed: December 11, 2023
    Publication date: September 19, 2024
    Inventors: Jaeil Lee, Kyoungcho Na
  • Publication number: 20230275032
    Abstract: A method of manufacturing a semiconductor device may determine rework of a photoresist pattern using an after-development inspection (ADI) of a semiconductor layer. The rework may include a single to dual conversion (SDC) of an overlay function.
    Type: Application
    Filed: November 1, 2022
    Publication date: August 31, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jaeil LEE, Kyoungcho NA
  • Publication number: 20230180475
    Abstract: A method for manufacturing a semiconductor device including forming a first substrate and a second substrate thereon; forming a first stack region by alternately stacking first interlayer insulating and sacrificial layers on the second substrate; forming a second stack region by alternately stacking second interlayer insulating and sacrificial layers on the first stack region; forming first openings spaced apart from each other in the first direction by partially removing the second stack region; forming a first filling insulating layer in the first openings; forming a second opening by partially removing the second stack region between the first openings; removing the second sacrificial layers exposed through the second opening; forming a lower separation region including the first filling insulating layer and a second filling insulating layer, by forming the second filling insulating layer in the second opening and regions in which the second sacrificial layers have been removed.
    Type: Application
    Filed: August 24, 2022
    Publication date: June 8, 2023
    Inventors: Hyunmook CHOI, Jihong KIM, Kyoungcho NA
  • Publication number: 20230074537
    Abstract: An overlay measurement method for accurately measuring and correcting an overlay in an environment in which a deep ultraviolet (DUV) apparatus and an extreme ultraviolet (EUV) apparatus are used together, a semiconductor device manufacturing method using the overlay measurement method, and an overlay measurement apparatus are provided. The overlay measurement method includes performing an absolute measurement of a position of an overlay mark of at least one of a plurality of layers, based on a fixed position, wherein an exposure process is performed on a first layer of the plurality of layers by using the DUV apparatus, and an exposure process is performed on an nth layer of the plurality of layers, which is an uppermost layer of the plurality of layers, by using the EUV apparatus.
    Type: Application
    Filed: April 8, 2022
    Publication date: March 9, 2023
    Inventors: Jaeil Lee, Kyoungcho Na