Patents by Inventor Kyoung-Iae Cho

Kyoung-Iae Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7829932
    Abstract: Example embodiments relate to a semiconductor device including a fin-type channel region and a method of fabricating the same. The semiconductor device includes a semiconductor substrate, a semiconductor pillar and a contact plug. The semiconductor substrate includes at least one pair of fins used (or functioning) as an active region. The semiconductor pillar may be interposed between portions of the fins to connect the fins. The contact plug may be disposed (or formed) on the semiconductor pillar and electrically connected to top surfaces of the fins.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-hwan Song, Suk-pil Kim, Yoon-dong Park, Won-joo Kim, June-mo Koo, Kyoung-Iae Cho, Jae-woong Hyun, Sung-jae Byun
  • Patent number: 7679960
    Abstract: A highly integrated non-volatile memory device and a method of operating the non-volatile memory device are provided. The non-volatile memory device includes a semiconductor layer. A plurality of upper control gate electrodes are arranged above the semiconductor layer. A plurality of lower control gate electrodes are arranged below the semiconductor layer, and the plurality of upper control gate electrodes and the plurality of lower control gate electrodes are disposed alternately. A plurality of upper charge storage layers are interposed between the semiconductor layer and the upper control gate electrodes. A plurality of lower charge storage layers are interposed between the semiconductor layer and the lower control gate electrodes.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 16, 2010
    Assignee: Samsung Elecronics Co., Ltd.
    Inventors: Jae-woong Hyun, Kyu-charn Park, Yoon-dong Park, Won-joo Kim, Young-gu Jin, Suk-pil Kim, Kyoung-Iae Cho, Jung-hoon Lee, Seung-hwan Song
  • Patent number: 7649784
    Abstract: In a memory cell programming method, first through n-th programming operations are performed to program first through n-th bits of the n bits of data using the plurality of threshold voltage distributions. The first through n-th programming operations are performed sequentially. A threshold voltage difference between threshold voltage distributions used in the n-th programming operation is less than or equal to at least one threshold voltage difference between threshold voltage distributions used in the first through (n?1)-th programming operations.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Iae Cho, Jae-woong Hyun, Sung-jae Byun, Kyu-charn Park, Yoon-dong Park, Choong-ho Lee
  • Publication number: 20080157182
    Abstract: Example embodiments relate to a semiconductor device including a fin-type channel region and a method of fabricating the same. The semiconductor device includes a semiconductor substrate, a semiconductor pillar and a contact plug. The semiconductor substrate includes at least one pair of fins used (or functioning) as an active region. The semiconductor pillar may be interposed between portions of the fins to connect the fins. The contact plug may be disposed (or formed) on the semiconductor pillar and electrically connected to top surfaces of the fins.
    Type: Application
    Filed: October 31, 2007
    Publication date: July 3, 2008
    Inventors: Seung-hwan Song, Suk-pil Kim, Yoon-dong Park, Won-joo Kim, June-mo Koo, Kyoung-Iae Cho, Jae-Woong Hyun, Sung-jae Byun