Patents by Inventor Kyoung Il Na
Kyoung Il Na has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8975692Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.Type: GrantFiled: December 9, 2013Date of Patent: March 10, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Sang Gi Kim, Jin-Gun Koo, Seong Wook Yoo, Jong-Moon Park, Jin Ho Lee, Kyoung Il Na, Yil Suk Yang, Jongdae Kim
-
Publication number: 20140197449Abstract: Provided is a semiconductor rectifier device. The semiconductor rectifier device may include a substrate doped with a first conductive type, a second electrode provided on a bottom surface of the substrate, an active region and a field region defined on the substrate, a gate provided in the active region, a gate insulating film provided between the gate and the substrate, body regions provided on the substrate adjacent to first and second sides of the gate, facing each other, and doped with a second conductive type dopant different from the first conductive type, and a second conductive type plug region formed on the substrate adjacent to third and fourth sides of the gate, connecting the first and second sides.Type: ApplicationFiled: January 14, 2014Publication date: July 17, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Kunsik PARK, Kyoung IL NA, JIN-GUN KOO, Jin Ho LEE, Jong II WON
-
Publication number: 20140091388Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.Type: ApplicationFiled: December 9, 2013Publication date: April 3, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Sang Gi KIM, Jin-Gun KOO, Seong Wook YOO, Jong-Moon PARK, Jin Ho LEE, KYOUNG IL NA, Yil Suk Yang, Jongdae KIM
-
Publication number: 20140077302Abstract: According to a power rectifying device of embodiments of the inventive concept, a gate electrode, a source region, and a body region are connected in common to a first terminal, and a substrate beside the body region is connected to a second terminal. Thus, the power rectifying device having two terminals is realized. The gate electrode has s spacer-shape. Thus, a width of the gate electrode may be controlled to accurately control a channel length of a channel region of a transistor structure in the power rectifying device.Type: ApplicationFiled: March 18, 2013Publication date: March 20, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Kunsik PARK, KYOUNG IL NA, Jin Ho LEE, JIN-GUN KOO
-
Patent number: 8633072Abstract: Provided is a method of manufacturing a semiconductor device. The method may include etching a first conductive type semiconductor substrate to form a first trench, forming a second trench extending from the first trench, diffusing impurities into inner walls of the second trench to form a second conductive type impurity region surrounding the second trench, forming a floating dielectric layer covering inner walls of the second trench and a floating electrode filling the second trench, and forming a gate dielectric layer covering inner walls of the first trench and a gate electrode filling the first trench.Type: GrantFiled: December 21, 2012Date of Patent: January 21, 2014Assignee: Electronics and Telecommunications Research InstituteInventor: Kyoung Il Na
-
Patent number: 8629020Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.Type: GrantFiled: September 9, 2011Date of Patent: January 14, 2014Assignee: Electronics & Telecommunications Research InstituteInventors: Sang Gi Kim, Jin-Gun Koo, Seong Wook Yoo, Jong-Moon Park, Jin Ho Lee, Kyoung Il Na, Yil Suk Yang, Jongdae Kim
-
Publication number: 20130309824Abstract: Provided is a method of manufacturing a semiconductor device. The method may include etching a first conductive type semiconductor substrate to form a first trench, forming a second trench extending from the first trench, diffusing impurities into inner walls of the second trench to form a second conductive type impurity region surrounding the second trench, forming a floating dielectric layer covering inner walls of the second trench and a floating electrode filling the second trench, and forming a gate dielectric layer covering inner walls of the first trench and a gate electrode filling the first trench.Type: ApplicationFiled: December 21, 2012Publication date: November 21, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventor: KYOUNG IL NA
-
Publication number: 20130175614Abstract: Semiconductor devices and methods of fabricating the same are provided. The semiconductor device includes a substrate having a first region including a first element and a second region including a second element and including a lower substrate and an upper substrate bonded to each other, an epitaxial layer and an insulating layer disposed between the lower substrate and the upper substrate, the epitaxial layer disposed in the first region, and the insulating layer disposed in the second region, a device isolation pattern separating the first element from the second element, and a doped pattern disposed between the upper substrate and the insulating layer and between the upper substrate and the epitaxial layer. The first element is electrically connected to the lower substrate through the doped pattern and the epitaxial layer. The second element is electrically insulated from the lower substrate by the doped pattern and the insulating layer.Type: ApplicationFiled: September 10, 2012Publication date: July 11, 2013Applicant: Electronics and Telecommunications Research InstituteInventor: KYOUNG IL NA
-
Publication number: 20120098057Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.Type: ApplicationFiled: September 9, 2011Publication date: April 26, 2012Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang Gi KIM, Jin-Gun Koo, Seong Wook Yoo, Jong-Moon Park, Jin Ho Lee, Kyoung Il Na, Yil Suk Yang, Jongdae Kim