Abstract: According to an embodiment of the present disclosure, a storage device may include a memory device, and a memory controller configured to receive a read command from an external host and control the memory device according to the read command, wherein the read command may include a basic header segment commonly included in commands transferred between the external host and the memory controller and including information indicating that the read command is a command for requesting data stored in the memory device, a transaction specific field including information indicating that the read command is a read command for at least two or more logical addresses, and an extra header segment including information on the at least two or more logical addresses.

Abstract: A storage device includes a nonvolatile memory device including a replay protected memory block; and a memory controller for, as a submission command requesting access to the replay protected memory block is received from an external host including a host memory having a plurality of Physical Region Pages (PRPs), acquiring a host replay protected memory block data frame stored in one of the plurality of PRPs included in the external host and accessing the replay protected memory block. The submission command may include information on a position at which the memory controller is to store a response to the submission command among the plurality of PRPs.

Abstract: A memory controller includes: a host interface configured to receive, from a host, a diagnostic command for requesting performance of a self-test operation; and a processor configured to perform the self-test operation on a memory device, and generate a response corresponding to the diagnostic command, wherein the host interface is configured to transmit, to the host, the response including: a basic header segment commonly included in protocol information units transmitted/received between the memory controller and the host; and an extra header segment including result information indicating a result of the self-test operation.

Abstract: Provided herein may be an electronic device and a method of operating the same. The electronic device may include a memory device, and a controller configured to receive an inbound protocol information unit (PIU) from an external device and control the memory device based on the inbound PIU, wherein the inbound PIU includes a basic header segment including information about an extra header segment (EHS) length, and an extra header segment defined by the EHS length, and wherein the controller is configured to generate an error message depending on whether the PIU includes an error related to the extra header segment.

Abstract: A storage device includes a nonvolatile memory device including a replay protected memory block; and a memory controller for, as a submission command requesting access to the replay protected memory block is received from an external host including a host memory having a plurality of Physical Region Pages (PRPs), acquiring a host replay protected memory block data frame stored in one of the plurality of PRPs included in the external host and accessing the replay protected memory block. The submission command may include information on a position at which the memory controller is to store a response to the submission command among the plurality of PRPs.

Abstract: Provided herein may be a memory controller and a method of operating the same. The method of operating a memory controller may include determining whether a reset request received from a host is valid, based on boot workload information related to a plurality of boot stages of the host, and performing a reset operation on a memory device depending on whether the reset request is valid.

Abstract: According to an embodiment of the present disclosure, a storage device may include a memory device, and a memory controller configured to receive a read command from an external host and control the memory device according to the read command, wherein the read command may include a basic header segment commonly included in commands transferred between the external host and the memory controller and including information indicating that the read command is a command for requesting data stored in the memory device, a transaction specific field including information indicating that the read command is a read command for at least two or more logical addresses, and an extra header segment including information on the at least two or more logical addresses.

Abstract: According to an embodiment of the present disclosure, a storage device may include a memory device, and a memory controller configured to receive a read command from an external host and control the memory device according to the read command, wherein the read command may include a basic header segment commonly included in commands transferred between the external host and the memory controller and including information indicating that the read command is a command for requesting data stored in the memory device, a transaction specific field including information indicating that the read command is a read command for at least two or more logical addresses, and an extra header segment including information on the at least two or more logical addresses.

Abstract: Provided herein may be a memory controller and a method of operating the same. The method of operating a memory controller may include determining whether a reset request received from a host is valid, based on boot workload information related to a plurality of boot stages of the host, and performing a reset operation on a memory device depending on whether the reset request is valid.

Abstract: A storage device includes a nonvolatile memory device including a replay protected memory block; and a memory controller for, as a submission command requesting access to the replay protected memory block is received from an external host including a host memory having a plurality of Physical Region Pages (PRPs), acquiring a host replay protected memory block data frame stored in one of the plurality of PRPs and accessing the replay protected memory block. The submission command may include information on a position at which the memory controller is to store a response to the submission command among the plurality of PRPs.

Abstract: According to an embodiment of the present disclosure, a storage device may include a memory device, and a memory controller configured to receive a read command from an external host and control the memory device according to the read command, wherein the read command may include a basic header segment commonly included in commands transferred between the external host and the memory controller and including information indicating that the read command is a command for requesting data stored in the memory device, a transaction specific field including information indicating that the read command is a read command for at least two or more logical addresses, and an extra header segment including information on the at least two or more logical addresses.

Abstract: A data processing system may include a host and a memory system, the memory system may include a volatile recovery selection register and a nonvolatile memory device, wherein the memory system checks, after being reset, a value of the recovery selection register and determines whether to perform a recovery operation on the nonvolatile memory device, and when a reset is requested from the host, the memory system sets the value of the recovery selection register and resets the nonvolatile memory device, and the host may read set first data from the memory system through a first booting operation that starts during a power-on operation, may request a reset to the memory system, and may read set second data form the memory system through a second booting operation that starts after the reset of the memory system.

Abstract: A data processing system may include a host and a memory system, the memory system may include a volatile recovery selection register and a nonvolatile memory device, wherein the memory system checks, after being reset, a value of the recovery selection register and determines whether to perform a recovery operation on the nonvolatile memory device, and when a reset is requested from the host, the memory system sets the value of the recovery selection register and resets the nonvolatile memory device, and the host may read set first data from the memory system through a first booting operation that starts during a power-on operation, may request a reset to the memory system, and may read set second data form the memory system through a second booting operation that starts after the reset of the memory system.