Patents by Inventor Kyoung Kuk Kwon

Kyoung Kuk Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7449357
    Abstract: Provided is a method for fabricating an image sensor using a wafer back grinding process. The method includes: forming a microlens protection layer over a substrate structure including a light sensing device and other associated devices; opening a pad open unit of the substrate structure using a mask; removing the mask; forming a photoresist layer over the substrate structure with the microlens protection layer; gluing a tape on the photoresist layer; performing a wafer back grinding process; and removing the tape and the photoresist layer.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: November 11, 2008
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Eun-Ji Kim, Kyoung-Kuk Kwon
  • Publication number: 20060228826
    Abstract: Provided is a method for fabricating an image sensor using a wafer back grinding process. The method includes: forming a microlens protection layer over a substrate structure including a light sensing device and other associated devices; opening a pad open unit of the substrate structure using a mask; removing the mask; forming a photoresist layer over the substrate structure with the microlens protection layer; gluing a tape on the photoresist layer; performing a wafer back grinding process; and removing the tape and the photoresist layer.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 12, 2006
    Inventors: Eun-Ji Kim, Kyoung-Kuk Kwon
  • Patent number: 6631059
    Abstract: ESD protection circuit which can effectively protect a product with three or two leveled electrodes in any cases when an external (+) or (−) ESD charge flows into the product, including, in case of the ESD protection circuit for a product with three leveled electrodes(VP, VDD and GND), a first conduction type bipolar transistor and a second conduction type bipolar transistor connected in parallel between an input terminal and a GND, wherein the first conduction type bipolar transistor has a base terminal with a VP voltage applied thereto and the second conduction type bipolar transistor having a base terminal with a VDD voltage applied thereto, and collectors and emitters thereof connected to the input terminal or the GND.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: October 7, 2003
    Assignee: Hyundai Electronics Industries Co. Ltd.
    Inventor: Kyoung Kuk Kwon
  • Patent number: 6210990
    Abstract: Method for fabricating a solid state image sensor, which can improve a charge transfer efficiency of an end terminal, including the steps of (1) providing a first conduction type substrate having a second conduction type well and a BCCD formed therein for an end terminal, (2) continuously increasing impurity concentrations in a region of the substrate in which a floating diffusion region is to be formed and in a portion of an area of other substrate in which the regions are are to be formed for improving a horizontal charge transfer efficiency, and (3) forming transfer gates, an output gate, and reset gate on the substrate, and the floating diffusion region and a reset drain region in the BCCD, respectively.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: April 3, 2001
    Assignee: LG Semicon Co., Ltd.
    Inventor: Kyoung Kuk Kwon
  • Patent number: 5976908
    Abstract: A method for fabricating a solid-state image sensor includes the steps of forming a well of a first conductivity type in a substrate of a second conductivity type, forming a plurality of photoelectric conversion regions in the well, forming a plurality of charge coupled devices in the photoelectric conversion regions, forming a gate insulating layer over the substrate, forming a polysilicon layer over the gate insulating layer, forming a cap insulating layer over the polysilicon layer, forming a first optical shielding metal layer over the cap insulating layer, forming a first insulating layer over the first optical shielding metal layer, patterning the polysilicon layer, cap insulating layer, the first optical shielding metal layer, and the first insulating layer to form polygates, forming sidewall spacers on sides of the cap insulating layer and the polygate, forming a second optical shielding metal layer on sides of the first optical shielding metal layer and the sidewall spacers, and removing the first in
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: November 2, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventors: Kyoung Kuk Kwon, Jong Hoa Kim