Abstract: A nonvolatile memory device may be operated in a multi-bit mode at a lower operating current and with higher integrated of the memory device. A first buried electrode may be used as a first bit line, a second buried electrode may be used as a second bit line, and/or a gate electrode may be used as a word line. First and second resistance layers may be programmed with 2-bit data and the 2-bit data may be read from the first and second resistance layers. More than 2-bit data may be programmed and read using more than 2 buried electrodes.

Abstract: Example embodiments provide a method of operating a nonvolatile memory device in a multi-bit mode, which may operate at a low operating current and may be more integrated. In example embodiments, a first buried electrode may be used as a first bit line and a second buried electrode may be used as a second bit line, and a gate electrode may be used as a word line. Example methods may include programming 2-bit data to first and second resistance layers and reading the 2-bit data programmed in the first and second resistance layers. Example methods may include programming and reading more than 2-bit data using more than 2 buried electrodes.