Abstract: Proposed is a wind turbine blade with a lightning protection receptor. The wind turbine blade with a lightning protection receptor is a technology that allows for excellent lightning capture rate for both negative and positive lightning by improving lightning measures for conventional wind turbines, which are vulnerable to positive lightning, in line with the increasing wind turbine heights for large-scale power generation and the trend toward offshore wind power, and that minimizes post-repair/supplementary measures by limiting blade damage/coating peeling due to lightning strikes to a narrow area, unlike in the conventional case where damage or peeling of the coating occurs over the entire area of a blade when struck by lightning on an edge wire inserted into the lateral inner side of the blade.

Abstract: A semiconductor device includes; a first memory that stores first and second layer image data portions used to generate first and second frame images on a display device, a second memory that stores a change map, a display controller that generates positional information associated with an image data portion in response to the change map, and an interface that receives image data and positional information and generates a command for updating the image data.

Abstract: An image forming device comprises: an exposer having a plurality of light emitting devices, a light emitting device among the plurality of light emitting devices to transmit light toward a photosensitive drum; and a developer to develop an electrostatic latent image formed on a surface of the photosensitive drum by the light, wherein the light emitting device among the plurality of light emitting devices includes: a light emitting layer to generate the light; and a reflective layer to reflect at least a portion of the generated light. The reflective layer can include a plurality of sub-reflective layers, in which a thickness of a sub-reflective layer among the plurality of sub-reflective layers is different from a thickness of another sub-reflective layer among the plurality of sub-reflective layers, and/or a refractive index of a sub-reflective layer among the plurality of sub-reflective layers is different from a refractive index of another sub-reflective layer among the plurality of sub-reflective layers.

Abstract: A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.

Abstract: A display panel controller includes a display driver integrated circuit, an application processor, and a synchronization controller. The display driver integrated circuit drives a display panel to display a still image at a predetermined frame rate. The application processor provides the display driver integrated circuit with still image data for implementing the still image and a plurality of control signals generated by a timing controller. The synchronization controller controls synchronization of frames output to the display panel based on a minimum refresh rate of the display panel.

Abstract: An image forming device comprises: an exposer having a plurality of light emitting devices, a light emitting device among the plurality of light emitting devices to transmit light toward a photosensitive drum; and a developer to develop an electrostatic latent image formed on a surface of the photosensitive drum by the light, wherein the light emitting device among the plurality of light emitting devices includes: a light emitting layer to generate the light; and a reflective layer to reflect at least a portion of the generated light. The reflective layer can include a plurality of sub-reflective layers, in which a thickness of a sub-reflective layer among the plurality of sub-reflective layers is different from a thickness of another sub-reflective layer among the plurality of sub-reflective layers, and/or a refractive index of a sub-reflective layer among the plurality of sub-reflective layers is different from a refractive index of another sub-reflective layer among the plurality of sub-reflective layers.

Abstract: A system on chip (SoC) for transmitting data packets to a display driver integrated circuit (IC) controlling a plurality of displays is provided. The SoC includes a first register, and a central processing unit (CPU) configured to set first values in the first register to adjust a frame rate of each of the displays. A tearing effect (TE) signal detection circuit is configured to detect a TE signal output from the display driver IC. A data transmission circuit is configured to generate a plurality of frame rate adjustment signals using the detected TE signal and the first values and to control transmission timings of the data packets transmitted to the displays using the frame rate adjustment signals.

Abstract: A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.

Abstract: A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.

Abstract: A display controller includes a first register set by an open operating system, a second register set by a secure operating system, a first data input circuit configured to read normal data according to set information in the first register, a second data input circuit configured to read secure data according to set information in the second register, and a data processor configured to blend and output the normal data with the secure data to display the secure data over the normal data.

Abstract: Methods of adaptive image compensation are provided. A method of adaptive image compensation includes receiving illumination information sensed by a light sensor. The method includes calculating image characteristic information by analyzing an input image. The method includes determining a frame rate responsive to at least one among the illumination information, the image characteristic information, and a frame rate control signal. Moreover, the method includes compensating the input image responsive to the frame rate. Related apparatuses and image processing systems are also provided.

Abstract: A method of operating a display system may include receiving an indication signal indicating a data update, receiving data, and updating a whole frame on the display with an image corresponding to the data based on the indication signal corresponding to a whole frame or updating a partial frame on the display with an image corresponding to the data based on the indication signal corresponding to a partial frame.

Abstract: A display controller includes a synchronization signal adjusting circuit, which adjusts at least one of the delay and the pulse width of a synchronization signal generated in a display driver and outputs an adjusted synchronization signal, and a transmission timing control circuit configured to control the transmission timing of display data, which will be transmitted to the display driver, in response to the adjusted synchronization signal.

Abstract: A display controller includes a first register set by an open operating system, a second register set by a secure operating system, a first data input circuit configured to read normal data according to set information in the first register, a second data input circuit configured to read secure data according to set information in the second register, and a data processor configured to blend and output the normal data with the secure data to display the secure data over the normal data.

Abstract: A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.

Abstract: A system on chip (SoC) includes a first display subsystem configured to perform first and second imaging functions and a second display subsystem configured to only perform the first imaging function. The SoC is configured to activate one of the display subsystems and deactivate the other display subsystem based on a comparison of a current frame of image data and a previous frame of image data.

Abstract: A display panel controller includes a display driver integrated circuit that drives a display panel to display a still image at a predetermined frame rate, an application processor that provides the display driver integrated circuit with still image data for implementing the still image and a plurality of control signals generated by a timing controller, and a synchronization controller that controls a frame synchronization of the display panel based on a minimum refresh rate of the display panel.

Abstract: A semiconductor device includes; a first memory that stores first and second layer image data portions used to generate first and second frame images on a display device, a second memory that stores a change map, a display controller that generates positional information associated with an image data portion in response to the change map, and an interface that receives image data and positional information and generates a command for updating the image data.

Abstract: A system on chip (SoC) for transmitting data packets to a display driver integrated circuit (IC) controlling a plurality of displays is provided. The SoC includes a first register, and a central processing unit (CPU) configured to set first values in the first register to adjust a frame rate of each of the displays. A tearing effect (TE) signal detection circuit is configured to detect a TE signal output from the display driver IC. A data transmission circuit is configured to generate a plurality of frame rate adjustment signals using the detected TE signal and the first values and to control transmission timings of the data packets transmitted to the displays using the frame rate adjustment signals.

Abstract: In one example embodiment, a method of operating an image data processing circuit which controls an operation of an organic light-emitting diode (OLED) display includes transforming at least one first RGB value into at least one luminance value and at least one chroma value. The method further includes adjusting the at least one luminance value and the at least one chroma value based on at least one first control value. The method further includes generating at least one second RGB value based on the at least one adjusted luminance value and the at least one adjusted chroma value. The method further includes outputting the second RGB values to the OLED display.