Patents by Inventor Kyoung-Sun Kim

Kyoung-Sun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120218703
    Abstract: A circuit board assembly includes a first circuit board having an electrical connection circuit on a surface thereof. A second circuit board is on the surface of the first circuit board. A first memory socket is mounted on the second circuit board. The first memory socket is only electrically connected to the electrical connection circuit through the second circuit board. A second memory socket is mounted on the second circuit board. The second memory socket that is only electrically connected to the electrical connection circuit through the second circuit board.
    Type: Application
    Filed: September 22, 2011
    Publication date: August 30, 2012
    Inventors: Jeong Hyeon Cho, Myung Hee Sung, Kyoung Sun Kim, Seung Jin Seo, Jung Joon Lee
  • Publication number: 20120014156
    Abstract: A data receiver includes a first buffer circuit and a second buffer circuit. The first buffer circuit varies a resistance of a data path and a resistance of a reference voltage path based on a plurality of control signals, and adjusts a voltage level of an input data signal and a level of a reference voltage to generate an internal data signal and an internal reference voltage based on the varied resistance of the data path and the varied resistance of the reference voltage path. The second buffer circuit compares the internal data signal with the internal reference voltage to generate a data signal.
    Type: Application
    Filed: May 18, 2011
    Publication date: January 19, 2012
    Inventors: Sung-Joo PARK, Jea-Eun Lee, Jung-Joon Lee, Yang-Ki Kim, Kyoung-Sun Kim
  • Patent number: 8036011
    Abstract: A memory module includes a plurality of buses and a plurality of memory chips arranged close to each other along each of the plurality of buses. An N-th memory chip, where N is an integer, of the plurality of memory chips is connected to any one of the plurality of buses, and each of the other memory chips of the plurality of memory chips, except for the N-th memory chip, is connected to the other one of the plurality of buses.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Sun Kim, Do Hyung Kim, Sung Joo Park, Baek Kyu Choi
  • Publication number: 20100332318
    Abstract: An automatic search advertisement presentation method, including: analyzing a keyword included in a title of an advertiser website, description of the advertiser website, content of the advertiser website, or condition entered by an advertiser; generating an impression keyword based on a result of the analysis; receiving a query from a user; comparing the query and the impression keyword; and presenting an advertisement corresponding to the impression keyword based on a result of the comparing.
    Type: Application
    Filed: May 23, 2008
    Publication date: December 30, 2010
    Applicant: NHN BUSINESS PLATFORM CORPORATION
    Inventors: Kyoung Sun Kim, Kyungsun Ko
  • Patent number: 7859879
    Abstract: A memory module, includes a memory module board and a plurality of memory devices on the memory module board. The memory module board includes one or more first input terminals configured to receive first signals to individually control the memory devices, and one or more second input terminals configured to receive second signals to commonly control the memory devices. Each of the memory devices includes a plurality of first signal input units configured to receive the first signals through one or more first input pins, a plurality of second signal input units configured to receive the second signals through one or more second input pins, and a plurality of dummy units, the dummy units being respectively connected to the first signal input units in parallel, and being configured to receive the first signals through one or more third input pins and to compensate for a signal line load.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Young-Ho Lee, Jea-Eun Lee
  • Patent number: 7799605
    Abstract: A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on the main PCB.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Jung-Joon Lee, Jea-Eun Lee
  • Publication number: 20100125693
    Abstract: A memory module includes a plurality of buses and a plurality of memory chips arranged close to each other along each of the plurality of buses. An N-th memory chip, where N is an integer, of the plurality of memory chips is connected to any one of the plurality of buses, and each of the other memory chips of the plurality of memory chips, except for the N-th memory chip, is connected to the other one of the plurality of buses.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 20, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Sun Kim, Do Hyung Kim, Sung Joo Park, Baek Kyu Choi
  • Patent number: 7715200
    Abstract: A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: May 11, 2010
    Assignees: Samsung Electronics Co., Ltd., Samsung Electro-Mechanics
    Inventors: Jung-Chan Cho, Yang-Je Lee, Hyun-Seok Choi, Yong-Hyun Kim, Jung-Hyeon Kim, Hyo-Jae Bang, Do-Hyung Kim, Kyoung-Sun Kim, Young-Ho Lee, Jae-Sang Baik, Yong-Jin Kim
  • Publication number: 20090209134
    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.
    Type: Application
    Filed: April 23, 2009
    Publication date: August 20, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Joo PARK, Kyoung-Sun KIM, Jung-Joon LEE, Jea-Eun LEE
  • Publication number: 20090154212
    Abstract: A memory module, includes a memory module board and a plurality of memory devices on the memory module board. The memory module board includes one or more first input terminals configured to receive first signals to individually control the memory devices, and one or more second input terminals configured to receive second signals to commonly control the memory devices. Each of the memory devices includes a plurality of first signal input units configured to receive the first signals through one or more first input pins, a plurality of second signal input units configured to receive the second signals through one or more second input pins, and a plurality of dummy units, the dummy units being respectively connected to the first signal input units in parallel, and being configured to receive the first signals through one or more third input pins and to compensate for a signal line load.
    Type: Application
    Filed: November 24, 2008
    Publication date: June 18, 2009
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Young-Ho Lee, Jea-Eun Lee
  • Patent number: 7540743
    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: June 2, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Jung-Joon Lee, Jea-Eun Lee
  • Publication number: 20090129041
    Abstract: A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs.
    Type: Application
    Filed: September 26, 2008
    Publication date: May 21, 2009
    Inventors: Jung-Chan Cho, Yang-Je Lee, Hyun-Seok Choi, Yong-Hyun Kim, Jung-Hyeon Kim, Hyo-Jae Bang, Do-Hyung Kim, Kyoung-Sun Kim, Young-Ho Lee, Jae-Sang Baik, Yong-Jin Kim
  • Publication number: 20080038961
    Abstract: A memory module socket disposed on a principal surface of a mainboard, and adapted to mechanically receive and electrically connect a memory module with a mainboard, the memory module socket including a first unit socket having a plurality of first socket pins adapted to electrically connect a first connector disposed on an edge of the memory module, and a second unit socket having a plurality of second socket pins adapted to electrically connect to a second connector disposed on the memory module orthogonal to the first connector, wherein the memory module as installed in the memory module socket is parallel to the principal surface of the mainboard.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Joo PARK, Kyoung-Sun KIM, Jung-Joon LEE, Jea-Eun LEE
  • Publication number: 20080030943
    Abstract: Embodiments of the invention provide memory module having an improved arrangement of discrete devices. In one embodiment, the invention provides a memory module comprising a board; a plurality of tabs disposed adjacent to a first edge of the board and disposed on a first surface of the board; and a memory pad region disposed on the first surface and comprising memory chip pads, wherein each memory chip pad is electrically connected to at least one of the tabs. The memory module further comprises discrete devices corresponding to the memory pad region, wherein the discrete devices corresponding to the memory pad region are disposed on only one side of the memory pad region. In the memory module, each of the discrete devices is electrically connected to at least one of the tabs and at least one of the memory chip pads.
    Type: Application
    Filed: February 21, 2007
    Publication date: February 7, 2008
    Inventors: Kyoung-sun Kim, Sung-joo Park, Jung-joon Lee, Jea-eun Lee
  • Publication number: 20080023702
    Abstract: A method of forming an integrated circuit module may include interposing an auxiliary PCB between at least one semiconductor chip and a main PCB, the auxiliary PCB having at least one circuit pattern for electrical connection to one of the semiconductor chip and at least one circuit pattern formed on the main PCB.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 31, 2008
    Inventors: Sung-Joo Park, Kyoung-Sun Kim, Jung-Joon Lee, Jea-Eun Lee
  • Publication number: 20070164448
    Abstract: Provided are a semiconductor chip package with attached electronic devices, and an integrated circuit module having the same. The semiconductor chip packages may include a supporting substrate, input/output bonding pads arranged on a first plane of the supporting substrate, and device bonding pads arranged on the edges of the first plane or portions of the first plane adjacent to the edges. Accordingly, the mount area of a printed circuit board may be reduced, efficient routing may be possible, and the occurrence of package cracks may be reduced and/or prevented.
    Type: Application
    Filed: August 17, 2006
    Publication date: July 19, 2007
    Inventors: Kyoung-Sun Kim, Ki-Hyun Ko, Byoung-Ha Oh