Patents by Inventor Kyoung Tae EUN

Kyoung Tae EUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11430763
    Abstract: A semiconductor package includes a plurality of stack modules which are vertically stacked. Each of the stack modules includes an interposing bridge, a semiconductor dies, and redistribution lines. The stack modules are provided by rotating each of the stack modules by different rotation angles corresponding to multiples of a reference angle and by vertically stacking the rotated stack modules. The interposing bridge includes a plurality of sets of through vias, and each set of through vias includes through vias arrayed in a plurality of columns. The plurality of sets of through vias are disposed in respective ones of divided regions of the interposing bridge. If the plurality of sets of through vias are rotated by the reference angle, then the rotated through vias overlap with the plurality of sets of through vias which are originally located. The redistribution lines connect the semiconductor dies to the plurality of sets of through vias.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: August 30, 2022
    Assignee: SK hynix Inc.
    Inventors: Bok Kyu Choi, Kyoung Tae Eun
  • Publication number: 20210265307
    Abstract: A semiconductor package includes a plurality of stack modules which are vertically stacked. Each of the stack modules includes an interposing bridge, a semiconductor dies, and redistribution lines. The stack modules are provided by rotating each of the stack modules by different rotation angles corresponding to multiples of a reference angle and by vertically stacking the rotated stack modules. The interposing bridge includes a plurality of sets of through vias, and each set of through vias includes through vias arrayed in a plurality of columns. The plurality of sets of through vias are disposed in respective ones of divided regions of the interposing bridge. If the plurality of sets of through vias are rotated by the reference angle, then the rotated through vias overlap with the plurality of sets of through vias which are originally located. The redistribution lines connect the semiconductor dies to the plurality of sets of through vias.
    Type: Application
    Filed: August 4, 2020
    Publication date: August 26, 2021
    Applicant: SK hynix Inc.
    Inventors: Bok Kyu CHOI, Kyoung Tae EUN
  • Patent number: 10811359
    Abstract: A stack package includes a first sub-package, a second sub-package stacked on the first sub-package. The first sub-package is configured to include first and second semiconductor dies, a first flexible bridge die disposed between the first and second semiconductor dies.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: October 20, 2020
    Assignee: Sk hynix Inc.
    Inventors: Ki Jun Sung, Kyoung Tae Eun
  • Publication number: 20200176385
    Abstract: A stack package includes a first sub-package, a second sub-package stacked on the first sub-package. The first sub-package is configured to include first and second semiconductor dies, a first flexible bridge die disposed between the first and second semiconductor dies.
    Type: Application
    Filed: August 6, 2019
    Publication date: June 4, 2020
    Applicant: SK hynix Inc.
    Inventors: Ki Jun SUNG, Kyoung Tae EUN