Patents by Inventor Kyoungll Huh

Kyoungll Huh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of forming WLCSP with semiconductor die embedded within interconnect structure
    Patent number: 10068877
    Abstract: A semiconductor device includes a semiconductor die. An encapsulant is deposited over the semiconductor die. An insulating layer is formed over the encapsulant and a first surface of the semiconductor die. A semiconductor component is disposed over the insulating layer and first surface of the semiconductor die. A first interconnect structure is formed over the encapsulant and first surface of the semiconductor die to embed the semiconductor component. A conductive via is formed in the semiconductor die. A heat sink is formed over the semiconductor die. A second interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the semiconductor component. An opening is formed in the insulating layer.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: September 4, 2018
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: KyungHoon Lee, HyunJin Song, Kyoungll Huh, DaeSik Choi
  • Semiconductor device and method of forming WLCSP with semiconductor die embedded within interconnect structure
    Patent number: 9349616
    Abstract: A semiconductor device includes a semiconductor die. An encapsulant is deposited over the semiconductor die. An insulating layer is formed over the encapsulant and a first surface of the semiconductor die. A semiconductor component is disposed over the insulating layer and first surface of the semiconductor die. A first interconnect structure is formed over the encapsulant and first surface of the semiconductor die to embed the semiconductor component. A conductive via is formed in the semiconductor die. A heat sink is formed over the semiconductor die. A second interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the semiconductor component. An opening is formed in the insulating layer.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 24, 2016
    Assignee: STATS ChipPAC, Ltd.
    Inventors: KyungHoon Lee, HyunJin Song, Kyoungll Huh, DaeSik Choi