Abstract: In a BOG treatment system, boil-off gas (BOG) discharged from a storage tank is compressed, most of the BOG is used as the fuel of vessel engines, and a remaining part of the BOG is liquefied by cold energy of BOG newly discharged from the storage tank and is returned to the storage tank, thereby efficiently utilizing the BOG. The BOG treatment system for a vessel includes a compressor compressing the BOG discharged from the storage tank; a medium pressure gas engine receiving at least a part of the BOG compressed by the compressor, as fuel; a heat exchanger exchanging heat between the remaining part of the BOG, which is not supplied to the medium pressure gas engine as fuel, and the BOG, which is discharged from the storage tank and is not compressed; and an expander decompressing the remaining part of the BOG cooled by the heat exchanger.

Abstract: Various embodiments of the disclosure provide an apparatus for protecting information. According to various embodiments of the disclosure, an apparatus for monitoring a database includes a transceiver, and a processor operatively coupled to the transceiver. The processor may be configured to acquire a query used in access of the database from the database through the transceiver, replace a first code, included in the acquired query, for query checking to a predefined text, convert the text to a second code for query checking, and output information on validity of the acquired query on the basis of a comparison result of the first code and the second code.

Abstract: Disclosed are a vertically-integrated 3-dimensional flash memory for improving a reliability of cells and a fabrication method thereof. The fabrication method of the vertically-integrated 3-dimensional flash memory includes sequentially stacking a first insulating layer and a second insulating layer on a substrate to form a plurality of insulating layers, etching a portion of the insulating layers to expose an area of the substrate, forming a channel layer on a side surface of the etched insulating layers and on the substrate, forming a first macaroni layer on the channel layer, and forming a second macaroni layer on the first macaroni layer such that a side surface and a lower surface of the second macaroni layer are surrounded by the first macaroni layer.

Abstract: Disclosed is a liquefied natural gas storage apparatus. The apparatus includes a heat insulated tank and liquefied natural gas contained in the tank. The tank has heat insulation sufficient to maintain liquefied natural gas therein such that most of the liquefied natural gas stays in liquid. The contained liquefied natural gas has a vapor pressure from about 0.3 bar to about 2 bar. The apparatus further includes a safety valve configured to release a part of liquefied natural gas contained in the tank when a vapor pressure of liquefied natural gas within the tank becomes higher than a cut-off pressure. The cut-off pressure is from about 0.3 bar to about 2 bar.

Abstract: Provided is a monoclonal antibody which specifically recognizes B cell lymphoma cells and a use thereof. More specifically, provided are the monoclonal antibody; a pharmaceutical composition for preventing or treating B cell lymphoma including the monoclonal antibody; a composition for diagnosing B cell lymphoma including the monoclonal antibody; a method for providing information for diagnosing B cell lymphoma using the monoclonal antibody; a chimeric antigen receptor (CAR) protein including i) the antibody, ii) a transmembrane domain, and iii) an intracellular signaling domain; a recombinant vector which expresses the CAR protein; a CAR-modified T cell transformed with the recombinant vector; a pharmaceutical composition for preventing or treating B cell lymphoma including the CAR-modified T cell; and an antibody-drug conjugate wherein the monoclonal antibody and a drug are conjugated.

Abstract: The present invention relates to a method for preventing a relay-attack on a smart key system, and in particular, provides an advantage of preventing a vehicle and equipment stored inside the vehicle from being stolen by using predetermined information transmitted and received when the SMK UNIT of the vehicle and a FOB Key wirelessly communicate with each other and enabling a holder of the FOB Key to make the relay-attack once the holder secures visibility from the vehicle.

Abstract: A processor-implemented method of generating feature data includes: receiving an input image; generating, based on a pixel value of the input image, at least one low-bit image having a number of bits per pixel lower than a number of bits per pixel of the input image; and generating, using at least one neural network, feature data corresponding to the input image from the at least one low-bit image.

Abstract: A three-dimensional (3D) image-based facial verification method and apparatus is provided. The facial verification method may include capturing a facial image of a 3D face of a user, determining an occluded region in the captured facial image by comparing the captured facial image and an average facial image, generating a synthetic image by synthesizing the captured facial image and the average facial image based on the occluded region, and verifying the user based on the synthetic image.

Abstract: Provided is a battery module including: a battery cell assembly including a plurality of battery cells stacked with one another; end plates configured to cover front and rear portions of the battery cell assembly and to be coupled to the battery cell assembly at a side of each of the end plates; and a fixing holder configured to be mounted to a battery cell assembly at an opposite side of each of the end plates in order to at least partially cover the battery cell assembly, and to protrude from front and rear portions of the end plates.

Abstract: The present disclosure relates to catalysts supported on a modified-carrier for oxidative coupling reaction of methane and a method for oxidative coupling reaction of methane using the same. The catalysts in which sodium tungstate is supported on a delaminated zeolite carrier increase the methane conversion rate and the selectivity to C2+ hydrocarbon compounds and thereby improve the reactivity of the oxidative coupling reaction of methane.

Abstract: Disclosed herein is a BOG reliquefaction method for LNG ships. The BOG reliquefaction method for LNG ships includes: 1) compressing BOG; 2) cooling the BOG compressed in Step 1) through heat exchange between the compressed BOG and a refrigerant using a heat exchanger; 3) expanding the BOG cooled in Step 2); and 4) stably maintaining reliquefaction performance regardless of change in flow rate of the BOG compressed in Step 1) and supplied to the heat exchanger to be used as a reliquefaction target.

Abstract: The present invention relates to a novel brominated furanone derivative, a method for preparing the same, and a pharmaceutical composition containing the same as an active ingredient, wherein the novel brominated furanone derivative or a pharmaceutically acceptable 5 salt thereof according to the present invention exhibits a quorum sensing inhibitory activity of bacteria and also can effectively inhibit the formation of biofilm of bacteria, and thus can be used as a pharmaceutical composition containing the same as an active ingredient, thereby having an effect of being useful, 10 for example, for periodontal diseases such as gingivitis and periodontitis, oral diseases, and the like.

Abstract: Disclosed is a processor-implemented data processing method in a neural network. A data processing apparatus includes at least one processor, and at least one memory configured to store instructions to be executed by the processor and a neural network, wherein the processor is configured to, based on the instructions, input an input activation map into a current layer included in the neural network, output an output activation map by performing a convolution operation between the input activation map and a weight quantized with a first representation bit number of the current layer, and output a quantized activation map by quantizing the output activation map with a second representation bit number based on an activation quantization parameter.

Abstract: A display apparatus includes a sensor panel configured to sense a first incident light, which is incident to the sensor panel subsequent to passing through a display, and configured to at least partially block transmission of light through the sensor panel. The display apparatus further includes a controller configured to selectively control the display to pass the first incident light toward the sensor panel, and configured to control the display to pass light out of the display to display an image. The sensor panel includes a first sensor unit and a second sensor unit configured to sense the incident first light, and the first sensor unit and the second sensor unit include respective unit color filters having different color filters.

Abstract: Disclosed are an organic light emitting display device and a method of manufacturing the same. The organic light emitting display device includes a thin film transistor (TFT) including a gate electrode and a source electrode provided on a substrate, a planarization layer provided on the TFT to have a step height, an anode electrode provided on the planarization layer and connected to the source electrode, an organic light emitting layer provided on an upper surface of the anode electrode, and a cathode electrode provided on the organic light emitting layer. The planarization layer includes a first area and a second area, provided at different heights, and a third area including an inclined surface between the first area and the second area. Also, the method includes forming a planarization layer on the source electrode to have a step height.

Abstract: A memory device includes a first strobe delay circuit delaying a first data strobe signal to generate a delayed first data strobe signal, a first write leveling circuit sampling a first delay clock in synchronization with the delayed first data strobe signal, a second strobe delay circuit delaying a second data strobe signal to generate a delayed second data strobe signal, a replica second strobe delay circuit delaying the first data strobe signal by a delay value obtained by replicating the second strobe delay circuit to generate a replica delayed second data strobe signal; and a second write leveling circuit sampling a second delay clock in synchronization with the delayed second data strobe signal in a first I/O mode, and sampling the second delay clock in synchronization with the replica delayed second data strobe signal in a second I/O mode.

Abstract: A stack package includes a first sub-package and a second sub-package stacked on the first sub-package. The first sub-package includes a first semiconductor chip, a first through mold via (TMV) for connection that is spaced apart from the first semiconductor chip in an X-axis direction, a first TMV for bypass that is spaced apart from the first semiconductor chip in a Y-axis direction, and a redistribution line (RDL) pattern for connecting the first semiconductor chip to the first TMV for connection. The second sub-package includes a second semiconductor chip, a second TMV for connection that is spaced apart from the second semiconductor chip in the Y-axis direction, and another RDL pattern for connecting the second semiconductor chip to the second TMV for connection. The second sub-package stacked is stacked on the first sub-package such that the second TMV for connection is connected to the first TMV for bypass.

Abstract: A face verifying method and apparatus. The face verifying method includes detecting a face region from an input image, generating a synthesized face image by combining image information of the face region and reference image information, based on a determined masking region, extracting one or more face features from the face region and the synthesized face image, performing a verification operation with respect to the one or more face features and predetermined registration information, and indicating whether verification of the input image is successful based on a result of the performed verification operation.

Abstract: A stack package includes a first sub-package and a second sub-package stacked on the first sub-package. The first sub-package includes a first through mold via (TMV) for connection spaced apart from a first semiconductor chip in an X-axis direction, a first TMV for bypass spaced apart from the first semiconductor chip in a Y-axis direction, and a first redistribution line (RDL) pattern connecting the first semiconductor chip to the first TMV for connection. The second sub-package includes a second TMV for connection spaced apart from a second semiconductor chip in the Y-axis direction and another RDL pattern connecting the second semiconductor chip to the second TMV for connection. the second sub-package is stacked on the first sub-package such that the second TMV for connection is connected to the first TMV for bypass.

Abstract: A semiconductor package may include a chip disposed on a substrate, a conductive structure disposed on the substrate to include a conductive structure frame including a side surface facing at least one side surface of the chip and to include conductive structure fingers extending from the conductive structure frame toward an edge of the substrate, and an electromagnetic interference (EMI) shielding layer covering the chip and the conductive structure and contacting a side surface of an end of one or more of the conductive structure fingers.