Abstract: An intuitive real spatial aiming-based system, and identification and communication methods using the intuitive real spatial aiming-based system. The intuitive real spatial aiming-based system includes aiming device, target devices and an indoor location-based service server. The aiming device includes a mobile computer or a Personal Digital Assistant (PDA), which is provided with a first high-speed wireless communication means, a first location tracking sensor, and an electronic compass having a magneto resistive sensor for detecting a direction. The target devices each includes a fixed computer, a home appliance, a PDA, or a mobile communication terminal, which is selectively provided with second high-speed wireless communication means and a second location tracking sensor. The indoor location-based service server tracks the indoor locations and coordinates of the aiming device and the target devices in real time.

Abstract: A mixed-mode semiconductor memory includes a memory bank array, an analog/digital converter, a digital/analog converter, a plurality of digital buses and a control unit. The memory bank array includes a plurality of memory banks that are each composed of a plurality of pieces of single port memory. The analog/digital converter converts an input analog signal into digital information to store data corresponding to the input analog signal in the memory of the memory bank. The digital/analog converter converts a designated memory address of the memory bank into an analog signal to output the memory address in analog signal output form. The plurality of digital buses transmits the address and the digital information. The control unit sets the analog/digital converter and the digital/analog converter to store and output the digital information and the analog information and supplying an address signal to the memory bank.

Abstract: A cache memory for a texture mapping process which is applicable to a high performance three-dimensional graphics card for a personal computer, three-dimensional game machines and other fields requiring small and high performance three-dimensional graphics. In particular, in order to accelerate a texture mapping process based upon a hardware-used mipmapping process using a trilinear interpolation in a three-dimensional graphics system, there is provided a cache memory in which only textures by a moderate size of a working set are stored, and all eight texels needed to perform a trilinear interpolation only in one clock cycle are accessed to obtain a final texel value, and a method enabling a reduction in penalty due to a cache miss by, with hardware-based prediction, prefetching textures to be needed in the future.

Abstract: A method for making a quantitative analysis of nickel that includes the steps of providing an amorphous silicon layer, forming an insulating film on the amorphous silicon layer, depositing nickel on the insulating film, etching a defined portion of the nickel with an etchant to create a specimen, drying the specimen on an AP1 film and subjecting the dried specimen to energy dispersive X-ray fluorescence analysis.

Abstract: A router, which is basically a point-to-point communication router, is devised for the BUS-like communication between processors. Therefore, it is named as ‘Virtual Bus’. One processor is connected to one router and the router can be connected in one dimensional array or two dimensional arrays. In case of two dimensional arrays, there are row and column router controllers. The method of communication consists of two phases: Firstly, the path between source processor and destination processor by sending set-up message. Secondly, messages are transferred without intervention of the intermediate routers between the source and destination processors. The idea is that the intermediate routers are set up to by-passing mode at the set-up phase. That is the routers in by-passing mode just relay the incoming messages to their output ports without any interruption. Therefore the virtual bus can guarantee high speed communication between processors.

Abstract: A method for making a quantitative analysis of nickel that includes the steps of providing an amorphous silicon layer, forming an insulating film on the amorphous silicon layer, depositing nickel on the insulating film, etching a defined portion of the nickel with an etchant to create a specimen, drying the specimen on an AP1 film and subjecting the dried specimen to energy dispersive X-ray fluorescence analysis.

Abstract: An Ethernet system includes a plurality of LAN cards each of which is embodied in a computing device and a switching hub connected to the LAN cards, each LAN card and the switching hub being connected by one pair of signal lines. In order to perform the data communications between the LAN card and the switching hub through one pair of signal lines, each of the LAN card and the switching hub further includes, in addition to a PHY and a MAC, a first control logic circuit for establishing a data transmission speed, a duplex mode, a link mode and an auto-negotiation activation state to have predetermined states, which are to be stored in the PHY and the MAC, and a second control logic circuit for executing a data collision and loop-back avoidance mechanism.

Abstract: A fuzzy operation apparatus which can supply various fuzzy operators by combining basic operators provided by hardware with microprograms, performs fuzzy operations in parallel by connecting a plurality of fuzzy operation portions using a network, and performs parallel defuzzification of the result of fuzzy operations stored in the fuzzy operation portions throughout the network. The present invention establishes a network between fuzzy operation portions, performs fuzzy operation in parallel at a plurality of fuzzy operation portions, and defuzzifies each element of a fuzzy set dispersed and stored in the fuzzy operation portions such that defuzzification speed is fast. Also, since there is no need for an exclusive defuzzification processor, the cost of the system is low.

Abstract: A fuzzy computer which provides high speed fuzzy processing by executing fuzzy information processing in parallel. The fuzzy computer operates according to programs and data downloaded from a host system, and executes fuzzy information processing in parallel to process this information at high speed. The fuzzy computer comprises a single fuzzy processing controller which downloads and designates to control memory operational programs from the host system, starts fuzzy operations according to signals inputted to an instruction register, and informs the host system of its processing status through a status register. A plurality of fuzzy processing elements are connected in parallel to the single fuzzy processing controller through system buses, download fuzzy data from the host system to each built-in knowledge base and perform respective functions in parallel according to control signals from the single fuzzy processing controller.