Patents by Inventor Kyu Hwan Shim

Kyu Hwan Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230330059
    Abstract: The present invention relates to a 3-phenyl-2H-chromene derivative and a pharmaceutical composition for preventing or treating Alzheimer’s, containing same as an active ingredient. The compound, a solvate thereof, a hydrate thereof, or a pharmaceutically acceptable salt thereof, provided according to one aspect of the present invention, inhibits, with high activity, the fibrosis and oligomerization of A? and thus has the effect of being usefully employable for preventing or treating Alzheimer’s.
    Type: Application
    Filed: September 1, 2021
    Publication date: October 19, 2023
    Applicant: NEUROBIONET, INC.
    Inventors: Seong Soo AN, Sunyeou KIM, Raok JEON, Keun-A CHANG, Kyu Hwan SHIM, Seongmin HONG, Jaehyuk LEE, Dahye YOON, Hyewon CHO, Shinwoo KANG, Hyunjun PARK, Chandra Bhushan MISHRA
  • Publication number: 20230282866
    Abstract: The present disclosure relates to a fuel cell stack including a reaction unit comprising a plurality of unit cells and configured to define reaction regions for electrochemical reactions of reactant gases, and manifold blocks disposed at two opposite ends of the reaction unit and provided independently of the reaction unit, the manifold blocks having manifold flow paths for supplying and discharging the reactant gases, thereby obtaining an advantageous effect of simplifying a structure and a manufacturing process and improving safety, maintainability, and reliability.
    Type: Application
    Filed: June 28, 2022
    Publication date: September 7, 2023
    Inventor: Kyu Hwan Shim
  • Patent number: 10495633
    Abstract: The present invention relates to a novel method for detecting a detection object in a sample, and a detection device using the same. The detecting method of the present invention uses a “bridge composite” in which gold nanoparticles and an antibody specific to a detection object are coupled in order to induce a sufficient coupling reaction between the antibody and the detection object, thereby improving reactivity. Accordingly, since excellent resolution is provided, the method of the present invention has advantages of enabling accurate concentration measurement of a detection object in a sample, and amplifying a measurement signal. In addition, the method of the present invention can effectively detect small molecules such as hormones, vitamins, etc. having a small molecular weight.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: December 3, 2019
    Assignee: NANOENTEK, INC.
    Inventors: Joon Seok Seo, Kyu Hwan Shim
  • Publication number: 20170184572
    Abstract: The present invention relates to a novel method for detecting a detection object in a sample, and a detection device using the same. The detecting method of the present invention uses a “bridge composite” in which gold nanoparticles and an antibody specific to a detection object are coupled in order to induce a sufficient coupling reaction between the antibody and the detection object, thereby improving reactivity. Accordingly, since excellent resolution is provided, the method of the present invention has advantages of enabling accurate concentration measurement of a detection object in a sample, and amplifying a measurement signal. In addition, the method of the present invention can effectively detect small molecules such as hormones, vitamins, etc. having a small molecular weight.
    Type: Application
    Filed: May 22, 2015
    Publication date: June 29, 2017
    Applicant: NANOENTEK INC.
    Inventors: Joon Seok SEO, Kyu Hwan SHIM
  • Publication number: 20140235016
    Abstract: Provided is a method of fabricating a semiconductor package, including preparing a die including a first metal layer and a second metal layer which are sequentially stacked on a silicon substrate, preparing a package substrate including a lead frame, and forming an adhesive layer between the lead frame and the first metal layer and attaching the die to the package substrate, wherein the forming of the adhesive layer is performed by eutectic bonding between the silicon substrate and the second metal layer. According to the semiconductor package according to an embodiment of the present invention, an adhesive layer can be easily formed by eutectic bonding without a process of forming a preform.
    Type: Application
    Filed: January 14, 2014
    Publication date: August 21, 2014
    Applicants: SIGETRONICS Inc., Electronics and Telecommunications Research Institute
    Inventors: Jong-Moon PARK, Jin Ho LEE, Deok-Ho CHO, Kyu-Hwan SHIM
  • Patent number: 7786510
    Abstract: An HBT structure and manufacturing method thereof, in which the HBT structure includes an emitter, an intrinsic base, a collector, an insulating sidewall, and a stress-inducing base formed by selective epitaxial growth to locally induce a stress to the HBT structure. Compressive or tensile stress is additionally induced from outside to modify physical and electric properties of a semiconductor layer, thereby improving the performance of the transistor.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: August 31, 2010
    Assignee: Chonbuk National University
    Inventors: Kyu-Hwan Shim, Sang-Sig Choi, A-Ram Choi
  • Publication number: 20100060887
    Abstract: Provided is a method for detecting a membrane module flaw, including: preparing fluorescent particles having a size of 0.5 to 1.5 ?m using silica; injecting the fluorescent particles in a concentration of greater than 0 mg/mL and less than 0.1 mg/mL or equal into a membrane module used in a sewage and wastewater treatment process; operating a pump to apply a pressure such that the fluorescent particles injected into the membrane module leak to the outside of the membrane module, in case that the membrane module has a flaw; acquiring a digital image of the membrane module; and discriminating a colored portion from a non-colored portion in the digital image.
    Type: Application
    Filed: September 3, 2009
    Publication date: March 11, 2010
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin Woo Cho, Ki Pal Kim, Kyu-Hwan Shim, Kyung Guen Song, Kyu Hong Ahn
  • Publication number: 20080116488
    Abstract: An HBT structure and manufacturing method thereof, in which the HBT structure includes an emitter, an intrinsic base, a collector, an insulating sidewall, and a stress-inducting base formed by selective epitaxial growth to locally induce a stress to the HBT structure. Compressive or tensile stress is additionally induced from outside to modify physical and electric properties of a semiconductor layer, thereby improving the performance of the transistor.
    Type: Application
    Filed: February 16, 2007
    Publication date: May 22, 2008
    Inventors: Kyu-Hwan Shim, Sang-Sig Choi, A-Ram Choi
  • Patent number: 7157977
    Abstract: There is provided a feedback amplifier capable of easily controlling its dynamic range without a separate gain control signal generation circuit. The feedback amplifier includes an input terminal detecting an input voltage from input current, a feedback amplification unit amplifying the input voltage to generate an output signal, and an output terminal outputting a signal amplified by the feedback amplification unit. The feedback amplification unit includes a feedback circuit unit including a feedback resistor located between the input terminal and the output terminal, and a feedback transistor connected in parallel to the feedback resistor; and a bias circuit unit supplying a predetermined bias voltage to the feedback transistor of the feedback circuit unit and merged in the feedback amplification unit.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: January 2, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Heung Lee, Hyeon Cheol Ki, Jin Yeong Kang, Kyu Hwan Shim, Kyong Ik Cho
  • Patent number: 7094617
    Abstract: An optoelectronic device and a method of manufacturing the same which the optoelectronic effect such as light emission or light reception can be increased by forming a dual-structural nano dot to enhance the confinement density of electrons and holes are provided. The optoelectronic device comprises an electron injection layer, a nano dot, and a hole injection layer. The nano dot has a dual structure composed of an external nano dot and an internal dot. The method of manufacturing the optoelectronic device comprises the steps of forming an electron injection layer on a semiconductor substrate; growing nano dot layer on the electron injection layer by an epi-growth method; heating the nano dot layer so that the nano dot has a dual structure composed of an external nano dot and an internal nano dot; and forming a hole injection layer on the overall structure.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: August 22, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Young Joo Song, Sang Hoon Kim, Jin Yeong Kang
  • Patent number: 6791105
    Abstract: An optoelectronic device and a method of manufacturing the same which the optoelectronic effect such as light emission or light reception can be increased by forming a dual-structural nano dot to enhance the confinement density of electrons and holes are provided. The optoelectronic device comprises an electron injection layer, a nano dot, and a hole injection layer. The nano dot has a dual structure composed of an external nano dot and an internal dot. The method of manufacturing the optoelectronic device comprises the steps of forming an electron injection layer on a semiconductor substrate; growing nano dot layer on the electron injection layer by an epi-growth method; heating the nano dot layer so that the nano dot has a dual structure composed of an external nano dot and an internal nano dot; and forming a hole injection layer on the overall structure.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: September 14, 2004
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Young Joo Song, Sang Hoon Kim, Jin Yeong Kang
  • Patent number: 6752874
    Abstract: The apparatus for a perpendicular type ultra vacuum chemical vapor deposition, which is for growing an epitaxy crystal as a semiconductor thin film based on a high quality, includes a growth chamber having a quartz tube of a heterostructure for maintaining a uniformity in a growth of an epitaxial layer under a high vacuum and minimizing a thermal transfer from a wafer; a wafer transferring chamber having a perpendicular transfer device for vertically transferring the wafer on which the epitaxial layer grows; a buffer chamber for preventing a stress to a transfer gear caused by a pressure difference with the wafer transferring chamber in vertically transferring the wafer; and a loadlock chamber for reducing a pollution from the outside in the growth of the epitaxial layer, horizontally transferring the wafer completed in the growth of the epitaxial layer, and discharging it to the outside.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: June 22, 2004
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu-Hwan Shim, Hong-Seung Kim, Seung-Yun Lee, Jin-Yeoung Kang
  • Publication number: 20040041144
    Abstract: An optoelectronic device and a method of manufacturing the same which the optoelectronic effect such as light emission or light reception can be increased by forming a dual-structural nano dot to enhance the confinement density of electrons and holes are provided. The optoelectronic device comprises an electron injection layer, a nano dot, and a hole injection layer. The nano dot has a dual structure composed of an external nano dot and an internal dot. The method of manufacturing the optoelectronic device comprises the steps of forming an electron injection layer on a semiconductor substrate; growing nano dot layer on the electron injection layer by an epi-growth method; heating the nano dot layer so that the nano dot has a dual structure composed of an external nano dot and an internal nano dot; and forming a hole injection layer on the overall structure.
    Type: Application
    Filed: December 24, 2002
    Publication date: March 4, 2004
    Inventors: Kyu Hwan Shim, Young Joo Song, Sang Hoon Kim, Jin Yeong Kang
  • Publication number: 20030040196
    Abstract: The present invention relates to a method of forming an insulating film in a semiconductor device by which the composition and the doping concentration of oxide are controlled using an atomic layer deposition method. In case of silicon oxide, a thermal oxidization process and a deposition process are sequentially performed to form an oxide film having a good interface characteristic and the deposition speed. On the other hand, in case of depositing an oxide film, an oxynitride film and a metal oxide film, the pulse construction and the supply time of a source and radical are adjusted to form an optimum oxide film having a good interface characteristic.
    Type: Application
    Filed: October 29, 2001
    Publication date: February 27, 2003
    Inventors: Jung Wook Lim, Young Joo Song, Kyu Hwan Shim, Jin Yeong Kang
  • Patent number: 6455871
    Abstract: There is disclosed a method for fabricating a SiGe MODFET device using a metal oxide film. The present invention provides a SiGe MODFET device with improved operation speed and reduced non-linear operation characteristic caused in a single channel structure devices, by increasing the mobility of the carriers in the SiGe MODEFT having a metal-oxide gate, and method of fabricating the same. In order to accomplish the above object, the present invention grows a silicon buffer layer and a SiGe buffer layer on a silicon substrate by low-temperature process, so that defects caused by the mismatch of the lattice constants being applied to the epitaxial layer from the silicon substrate are constrained in the buffer layered formed by the low-temperature process.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 24, 2002
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Hong Seung Kim, Seung Yun Lee, Jin Yeoung Kang
  • Publication number: 20020079507
    Abstract: There is disclosed a method for fabricating a SiGe MODFET device using a metal oxide film. The present invention provides a SiGe MODFET device with improved operation speed and reduced non-linear operation characteristic caused in a single channel stricture devices, by increasing the mobility of the carriers in the SiGe MODEFT having a metal-oxide gate, and method of fabricating the same. In order to accomplish the above object, the present invention grows a silicon buffer layer and a SiGe buffer layer on a silicon substrate by low-temperature process, so that defects caused by the mismatch of the lattice constants being applied to the epitaxial layer from the silicon substrate are constrained in the buffer layered formed by the low-temperature process.
    Type: Application
    Filed: August 13, 2001
    Publication date: June 27, 2002
    Inventors: Kyu Hwan Shim, Hong Seung Kim, Seung Yun Lee, Jin Yeoung Kang
  • Publication number: 20020056414
    Abstract: The apparatus for a perpendicular type ultra vacuum chemical vapor deposition, which is for growing an epitaxy crystal such as Si, SiGe, and SiGe:C as a semiconductor thin film based on a high quality, includes a growth chamber having a quartz tube of a heterostructure for maintaining a uniformity in a growth of an epitaxial layer under a high vacuum and minimizing a thermal transfer from a wafer; a wafer transferring chamber connected to a lower side of the growth chamber, said wafer transferring chamber having a perpendicular transfer device for vertically transferring the wafer on which the epitaxial layer grows; a buffer chamber equipped in a lower side of the wafer transferring chamber, for preventing a stress to a transfer gear caused by a pressure difference with the wafer transferring chamber in vertically transferring the wafer; and a loadlock chamber connected to one side of the wafer transferring chamber, for reducing a pollution from the outside in the growth of the epitaxial layer, horizontally t
    Type: Application
    Filed: February 20, 2001
    Publication date: May 16, 2002
    Inventors: Kyu-Hwan Shim, Hong-Seung Kim, Seung-Yun Lee, Jin-Yeoung Kang
  • Patent number: 6139760
    Abstract: Provided with a method of fabricating a 200-250 nm short-wavelength optoelectronic device, which has a combination of an optical device with a plurality of acceleration electrodes and a field emission device with a plurality of acceleration electrodes, from a semiconductor having a 5-6 eV energe band gap, based on a principle that an electron-hole pair is produced using a highly energetic electron which is injected from a field emission device, and short-wavelength photons are emitted when the electron recombines with the hole and confined in a quantum well to emit a light corresponding to the energy level of the quantum well, thereby eliminating the need of using dopants for forming n-p junctions in the semiconductor and achieving high efficiency in terms of energy because highly energetic electrons result in one or more electron-hole pairs.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: October 31, 2000
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Sung Woo Choi, Mun Cheol Baek, Kyoung Ik Cho, Hae Gwon Lee
  • Patent number: 6124147
    Abstract: The present invention relates to a semiconductor device and, more particularly, to a short-wavelength optoelectronic device and a method for fabricating the same. The optoelectronic device according to the present invention doesn't have to employ an ion implantation process and an ohmic contact to make the n-p junction in the WB compound semiconductor, providing a sufficient efficiency for display. The method according to the present invention comprises the step of a) forming a SiC:AlN super lattice multilayer by alternately forming a SiC epitaxial film and an AlN epitaxial film on a substrate, wherein the AlN film is formed and the SiC film is formed using a single source gas of 1,3disilabutane in an nitrogen plasma-assisted metalorganic molecular beam epitaxy system; and b) applying a thermal treatment to the SiC:AlN super lattice multilayer, thereby a mixed crystal compound having (SiC).sub.x (AlN).sub.1-x quantum wells obtained by a diffusion of SiC film and AlN.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: September 26, 2000
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Mun Cheol Paek, Kyoung Ik Cho
  • Patent number: 6100103
    Abstract: The present invention has been made in view of the above mentioned problem, and the present invention provides a highly integrated multicolor light emitting device which emits multiple colors in a chip by integrating light emitting devices of different colors, and in accordance with an aspect of the present invention, there is disclosed a light emitting device including: a plurality of light emitting elements formed on a substrate each of which comprises a plurality of semiconductor layers, wherein each of the plurality of light emitting elements radiates a light of different wavelength from one another.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: August 8, 2000
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyu Hwan Shim, Mun Cheol Baek, Hae Kwon Lee, Ki Soo Nam