Abstract: A digital phase interpolator including a plurality of delay stages to control delay time of an output signal from first and second input signals having different phase delays. The plurality of delay stages are connected serially, have a same internal structure, determine corresponding axes for interpolation in each stage, and each includes a first inverting section for inverting first and second signal inputs from the previous stage, a phase blender for blending outputs of the first inverting section, a second inverting section for inverting outputs of the first inverting section, and a multiplexer for generating input signals for the next stage in response to a selection signal for determining phase delay time of the output signal of the phase interpolator. Total area and current may be reduced by the present invention because the number of inverters comprising each stage is equal.

Abstract: A digital phase interpolator including a plurality of delay stages to control delay time of an output signal from first and second input signals having different phase delays. The plurality of delay stages are connected serially, have a same internal structure, determine corresponding axes for interpolation in each stage, and each includes a first inverting section for inverting first and second signal inputs from the previous stage, a phase blender for blending outputs of the first inverting section, a second inverting section for inverting outputs of the first inverting section, and a multiplexer for generating input signals for the next stage in response to a selection signal for determining phase delay time of the output signal of the phase interpolator. Total area and current may be reduced by the present invention because the number of inverters comprising each stage is equal.

Abstract: A method for forming an interconnection of a semiconductor device according to the present invention can improve reliability of the semiconductor device by preventing copper ions from being diffused into an insulating film during a cleaning step before the formation of an upper copper interconnection.

Abstract: A method for fabricating a contact plug that has a superior step coverage and does not have internal micro-cracks, including a first step for forming an insulating film including a contact hole on a silicon substrate, a second step for forming a Ti film in the contact hole, a third step for forming a TiN film on the Ti film, and a fourth step for repeatedly performing the second and third steps.