Patents by Inventor Kyu-Jin Han

Kyu-Jin Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160209907
    Abstract: A method of and an electronic device for performing a power-saving mode in the electronic device, according is provided. The method includes driving at least one processor; detecting a command for switching to a power-saving mode; and if the command for switching to the power saving mode is detected, limiting operations of the at least one processor to block set functions other than a power saving call function in accordance with at least one set power saving scheme.
    Type: Application
    Filed: August 22, 2014
    Publication date: July 21, 2016
    Inventors: Kyu-Jin HAN, Tae-Yun KIM, Min-Sung EO, Sang-Hyeon YOON, Young-Je LEE
  • Patent number: 8426951
    Abstract: A multi-chip package is provided. The multi-chip package may include a frame interposer, a first chip stack with n number of semiconductor chips on a first surface of the frame interposer, and a second chip stack with m number of semiconductor chips on a second surface of the frame interposer. The interposer may have first and second openings. The first chip stack may extend over one of the first and second openings and may expose the other of the first and second openings. The second chip stack may extend over the other of the first and second openings and may expose the one of the first and second openings.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: April 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyu-Jin Han
  • Publication number: 20110180916
    Abstract: A multi-chip package is provided. The multi-chip package may include a frame interposer, a first chip stack with n number of semiconductor chips on a first surface of the frame interposer, and a second chip stack with m number of semiconductor chips on a second surface of the frame interposer. The interposer may have first and second openings. The first chip stack may extend over one of the first and second openings and may expose the other of the first and second openings. The second chip stack may extend over the other of the first and second openings and may expose the one of the first and second openings.
    Type: Application
    Filed: December 3, 2010
    Publication date: July 28, 2011
    Inventor: Kyu-Jin HAN
  • Publication number: 20070164404
    Abstract: A semiconductor package may include a semiconductor chip assembly, a signal input/output member and an encapsulating member. The semiconductor chip assembly may include first pads and second pads. The first pads may be exposed in a first direction. The second pads may be exposed in a second direction substantially opposite to the first direction. The signal input/output member may include first terminals and second terminals. The first terminals may be electrically connected to the first pads. The second terminals may be electrically connected to the second pads. The encapsulating member may encapsulate the semiconductor chip assembly.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 19, 2007
    Inventor: Kyu-Jin Han