Abstract: A case for a secondary battery, in which an electrode assembly having a structure, in which electrodes and separators are alternately disposed, is accommodated, includes: a first recess part and a second recess part, each of which has a recessed shape; a circumferential part configured to surround a circumference of each of the first recess part and the second recess part when the case is unfolded; and a connection part provided between the first recess part and the second recess part to connect the first recess part to the second recess part, wherein, when the case is unfolded, the connection part has a shape that is recessed from each of the first recess part and the second recess part in one direction.

Abstract: A polyolefin thermoplastic elastomer composition for an airbag chute, includes a polypropylene, an olefin block copolymer, and a dendrimer as a material applied to a raw material of a passenger airbag chute. An olefin elastomer composite resin composition for an airbag chute includes 30-80 parts by weight of a polypropylene resin, 30-70 parts by weight of an olefin block copolymer, and 0.1-5 parts by weight of a dendrimer based on 100 parts by weight of the olefin elastomer composite resin composition. The olefin elastomer composite resin composition for an airbag chute, improves the dispersion of the elastomer by applying a high-flow elastomer and a low-flow polypropylene, and improves flowability and meltability characteristics without deteriorating physical properties by applying the dendrimer.

Abstract: A silica sol, a silica aerogel blanket using the same, and a method for manufacturing the same, wherein a hydrophobizing agent, a base catalyst, an organic solvent, and water are included in a catalyst composition when manufacturing the silica aerogel blanket, so that a wet aging step which is performed under high-temperature conditions and increases the amount of a solvent used, surface modification step which uses a large amount of an organic solvent and an expensive surface modifier, resulting in a process that is complex and long and thus inhibiting economic feasibility and productivity, can be omitted.

Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.

Abstract: A semiconductor memory device includes a substrate including an element separation film and an active region defined by the element separation film, a bit line structure on the substrate, a trench in the element separation film and the active region, the trench on at least one side of the bit line structure and including a first portion in the element separation film and a second portion in the active region, a bottom face of the first portion placed above a bottom face of the second portion, a single crystal storage contact filling the trench, and an information storage element electrically connected to the single crystal storage contact.

Abstract: A display device according to an embodiment includes: a first conductive layer that is disposed on a substrate; a transistor that is disposed on the substrate; and a light emitting element that is electrically connected to the transistor, wherein the transistor includes a semiconductor layer that at least partially overlaps the first conductive layer and is disposed on the first conductive layer, and a gate electrode that is disposed on the semiconductor layer. The semiconductor layer includes a first region that does not overlap the first conductive layer, a third region that overlaps the first conductive layer, and a second region that is disposed between the first region and the third region and traverses an edge of the first conductive layer. The first width of the semiconductor layer in the first region is smaller than a second width of the semiconductor layer in the second region.

Abstract: A display device according to an embodiment includes: a first conductive layer that is disposed on a substrate; a transistor that is disposed on the substrate; and a light emitting element that is electrically connected to the transistor, wherein the transistor includes a semiconductor layer that at least partially overlaps the first conductive layer and is disposed on the first conductive layer, and a gate electrode that is disposed on the semiconductor layer. The semiconductor layer includes a first region that does not overlap the first conductive layer, a third region that overlaps the first conductive layer, and a second region that is disposed between the first region and the third region and traverses an edge of the first conductive layer. The first width of the semiconductor layer in the first region is smaller than a second width of the semiconductor layer in the second region.

Abstract: Provided is a bus network system including: a master node switch; and a plurality of slave node switches, wherein each of the plurality of slave node switches includes at least one band limit switch configured to transmit signals in a given band, and each of the plurality of slave node switches is configured to be physically on/off controlled.

Abstract: Provided is a bus network system including: a master node switch; and a plurality of slave node switches, wherein each of the plurality of slave node switches includes at least one band limit switch configured to transmit signals in a given band, and each of the plurality of slave node switches is configured to be physically on/off controlled.