Abstract: An operation method includes measuring figure of merit (FoM) values for a first group of presets having different preset types, based on equalized signals output from a transmission equalizer included in an external device adjusted based on the first group, identifying a preset type of a first preset corresponding to first FoM value which is a greatest value from among the FoM values for the first group, measuring FoM values for a second group of presets having the identified preset type, based on equalized signals output from the transmission equalizer adjusted based on the second group, determining a second preset corresponding to second FoM value which is a greatest value from among the first FoM value and the FoM values for the second group, and transmitting an equalizing setup request that controls the transmission equalizer to the external device, based on the determined second preset.

Abstract: A method for operating an integrated circuit, including: completing a first link equalization operation with an external integrated circuit; receiving a first signal transmitted by an external transmitter included in the external integrated circuit during an operation at an internal receiver included in the integrated circuit; measuring an eye margin of the first signal at the internal receiver; comparing the measured eye phase with a threshold eye margin to obtain and store a comparison result; transmitting the comparison result as a second signal to an external receiver included in the external integrated circuit using an internal transmitter included in the internal integrated circuit; and performing a second link equalization operation between the external transmitter and the external receiver based on the second signal.

Abstract: An operation method includes measuring figure of merit (FoM) values for a first group of presets having different preset types, based on equalized signals output from a transmission equalizer included in an external device adjusted based on the first group, identifying a preset type of a first preset corresponding to first FoM value which is a greatest value from among the FoM values for the first group, measuring FoM values for a second group of presets having the identified preset type, based on equalized signals output from the transmission equalizer adjusted based on the second group, determining a second preset corresponding to second FoM value which is a greatest value from among the first FoM value and the FoM values for the second group, and transmitting an equalizing setup request that controls the transmission equalizer to the external device, based on the determined second preset.

Abstract: A storage system includes a processor configured to request a write operation of first data corresponding to a first logical address, and requests a write operation of second data corresponding to a second logical address, a memory module including a nonvolatile memory device configured to store the first data and the second data, and a controller configured to convert the first logical address into a first device logical address, and converts the second logical address into a second device logical address based on the first device logical address and a size of the first data, and a storage device configured to store the first data in the storage device based on the first device logical address, and store the second data in the storage device based on the second device logical address.

Abstract: A storage system includes a processor configured to request a write operation of first data corresponding to a first logical address, and requests a write operation of second data corresponding to a second logical address, a memory module including a nonvolatile memory device configured to store the first data and the second data, and a controller configured to convert the first logical address into a first device logical address, and converts the second logical address into a second device logical address based on the first device logical address and a size of the first data, and a storage device configured to store the first data in the storage device based on the first device logical address, and store the second data in the storage device based on the second device logical address.

Abstract: An acupressure apparatus includes a tub configured to receive the user's feet for acupressure treatment, an acupressure station having a pair of designated foot placing areas for facilitating accurate positioning of the feet on the acupressure station, a plurality of upward projections formed on an upper surface of the acupressure station, and a plurality of watering holes formed around the projections, and a water supply conduit connected to the bottom wall of the tub for supplying compressed water by operation of a water pump. The watering holes formed in the acupressure station are directed to acupressure points of the feet such that the compressed water delivered through the watering holes provides acupressure stimulations to the acupressure points of the feet.

Abstract: An acupressure apparatus includes a tub configured to receive the user's feet for acupressure treatment, an acupressure station having a pair of designated foot placing areas for facilitating accurate positioning of the feet on the acupressure station, a plurality of upward projections formed on an upper surface of the acupressure station, and a plurality of watering holes formed around the projections, and a water supply conduit connected to the bottom wall of the tub for supplying compressed water by operation of a water pump. The watering holes formed in the acupressure station are directed to acupressure points of the feet such that the compressed water delivered through the watering holes provides acupressure stimulations to the acupressure points of the feet.

Abstract: A memory device includes an interface unit and a memory unit. The interface unit receives a clock signal, a command signal and a data signal, internally adjusts input impedance based upon at least one of the command signal and the clock signal, and generates internal control signal of the memory device based upon the command signal and data signal. The memory unit performs read/write operations based upon the internal control signal.

Abstract: There are provided a DC/DC converter and a driving apparatus having the same. The DC/DC converter includes a DC/DC converter part converting an input power into a predetermined DC power by switching the input power to thereby supply the converted DC power to a light emitting device; and a control part controlling switching of the DC/DC converter part in accordance with a driving signal applied to the light emitting device to thereby control a voltage level of the DC power.

Abstract: A test mode control circuit is provided to strictly allow entry into a test mode or prevent a boot failure from occurring during a boot operation for a built-in parallel bit test. The test mode control circuit includes a latch, a real entry signal detector, an entry determinator, and a mode control signal generator. When a real entry signal is detected, the entry signal determinator generates an entry determination signal and a test mode control signal is obtained from the mode control signal generator.

Abstract: There are provided a DC/DC converter and a driving apparatus having the same. The DC/DC converter includes a DC/DC converter part converting an input power into a predetermined DC power by switching the input power to thereby supply the converted DC power to a light emitting device; and a control part controlling switching of the DC/DC converter part in accordance with a driving signal applied to the light emitting device to thereby control a voltage level of the DC power.

Abstract: There is provided a backlight unit driver capable of driving multi-channel lamps of a backlight unit, especially LED lamps, by supplying a driving power to the lamps using a single transformer and maintaining the current balance of the driving power supplied to each of the lamps.

Abstract: A memory device includes an interface unit and a memory unit. The interface unit receives a clock signal, a command signal and a data signal, internally adjusts input impedance based upon at least one of the command signal and the clock signal, and generates internal control signal of the memory device based upon the command signal and data signal. The memory unit performs read/write operations based upon the internal control signal.

Abstract: A test mode control circuit is provided to strictly allow entry into a test mode or prevent a boot failure from occurring during a boot operation for a built-in parallel bit test. The test mode control circuit includes a latch, a real entry signal detector, an entry determinator, and a mode control signal generator. When a real entry signal is detected, the entry signal determinator generates an entry determination signal and a test mode control signal is obtained from the mode control signal generator.

Abstract: There is provided a backlight unit driver capable of driving multi-channel lamps of a backlight unit, especially LED lamps, by supplying a driving power to the lamps using a single transformer and maintaining the current balance of the driving power supplied to each of the lamps.